CY7C68053-56BAXIT Cypress Semiconductor Corp, CY7C68053-56BAXIT Datasheet - Page 29

CY7C68053-56BAXIT

CY7C68053-56BAXIT

Manufacturer Part Number
CY7C68053-56BAXIT
Description
CY7C68053-56BAXIT
Manufacturer
Cypress Semiconductor Corp
Series
MoBL-USB™r
Datasheet

Specifications of CY7C68053-56BAXIT

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB
Number Of I /o
56
Voltage - Supply
1.71 V ~ 1.89 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-VFBGA
Processor Series
CY7C68xx
Core
8051
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3687 - KIT DEV MOBL-USB FX2LP18
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C68053-56BAXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
9.6 Slave FIFO Asynchronous Write
Table 17. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK
9.7 Slave FIFO Synchronous Packet End Strobe
Table 18. Slave FIFO Synchronous Packet End Strobe Parameters with Internally Sourced IFCLK
Table 19. Slave FIFO Synchronous Packet End Strobe Parameters with Externally Sourced IFCLK
Document # 001-06120 Rev *J
t
t
t
t
t
t
t
t
t
t
t
t
t
WRpwl
WRpwh
SFD
FDH
XFD
IFCLK
SPE
PEH
XFLG
IFCLK
SPE
PEH
XFLG
Parameter
Parameter
Parameter
SLWR pulse LOW
SLWR pulse HIGH
SLWR to FIFO data setup time
FIFO data to SLWR hold time
SLWR to FLAGS output propagation delay
IFCLK period
PKTEND to clock setup time
Clock to PKTEND hold time
Clock to FLAGS output propagation delay
IFCLK period
PKTEND to clock setup time
Clock to PKTEND hold time
Clock to FLAGS output propagation delay
Figure 13. Slave FIFO Synchronous Packet End Strobe Timing Diagram
Figure 12. Slave FIFO Asynchronous Write Timing Diagram
PKTEND
FLAGS
DATA
SLWR
FLAGS
IFCLK
Description
Description
Description
t
WRpwl
t
SFD
t
XFD
t
FDH
t
SPE
t
WRpwh
t
t
PEH
XFLG
20.83
20.83
14.6
3.04
Min
Min
Min
8.6
50
50
10
10
0
[19]
[16]
Max
Max
Max
13.5
200
9.5
70
[16]
[10]
[10]
CY7C68053
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Page 29 of 42
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