CYIL1SE3000AA-GZDC Cypress Semiconductor Corp, CYIL1SE3000AA-GZDC Datasheet - Page 14

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CYIL1SE3000AA-GZDC

Manufacturer Part Number
CYIL1SE3000AA-GZDC
Description
IC IMAGE SENSOR 3MP 369-PGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYIL1SE3000AA-GZDC

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LVDS Specifications
The LUPA 3000 features a 33 channel LVDS data interface,
which enables high data rates at a limited pin count with low
power and noise. The LUPA 3000 guarantees 412 Mbps trans-
The LUPA 3000 accepts an LVDS input clock to generate and synchronize the serial data stream. The clock used to synchronize all
the data channels is transmitted over the thirty fourth channel. This clock signal recovers the data on the receive end without the need
for clock recovery. The receiver must feature per channel skew correction to account for on-chip mismatches and intrinsic delays, and
also for interconnect medium mismatches.
The LVDS outputs comply to the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The main specifications are described in the
standard. Following the measurement conditions of the standard, the LUPA 3000 LVDS drivers feature the specifications listed in
Table 11
Document Number: 001-44335 Rev. *C
on page 15.
Figure 12. Overview of LVDS Setup
PRELIMINARY
mission over all channels accumulating to an aggregate
guaranteed data rate of 13.6 Gbps. The transmission medium
can be PCB traces, backplanes, or cables with a characteristic
impedance of approximately 100 Ω.
CYIL1SN3000AA
Page 14 of 61
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