CYIL1SE3000AA-GZDC Cypress Semiconductor Corp, CYIL1SE3000AA-GZDC Datasheet - Page 27

• Manufacturer Part Number: CYIL1SE3000AA-GZDC
• Description: IC IMAGE SENSOR 3MP 369-PGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYIL1SE3000AA-GZDC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sensor Clock Edge Adjust Register (b1000001 / d65)
The sensor clock edge adjust register allows programmable delay between the column readout and the ADC capture clock edges.
The relationship is programmed to align to ±7 edges of the input high speed clock (input lvds clock or CLK_SER).
this relationship between the input clock and all the derived on-chip clocks. Some examples of programmed delay values for both
CLK_SEN and CLK_SEQ are also shown.
Document Number: 001-44335 Rev. *C
DLY_SEN = 0000
DLY_SEQ =
DATA_OUT
SER_LOAD
CLK_ADC
ADC_OUT
CLK_CRC
CRC_OUT
CLK_SEN
CLK_SEQ
CLK_SER
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
0111
1111
1
0
Figure 13.
7
DATA(N+1)
PRELIMINARY
6
5
LUPA 3000 Internal Clocking
4
3
2
1
0
7
DATA(N)
6
5
4
3
DATA(N+1)
2
1
0
7
6
DATA(N-1)
5
DATA(N+1)
CYIL1SN3000AA
4
DATA(N)
3
2
Figure 13
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