STV2310D STMicroelectronics, STV2310D Datasheet - Page 14
STV2310D
Manufacturer Part Number
STV2310D
Description
Video ICs Digital Video Decodr
Manufacturer
STMicroelectronics
Type
High Quality front end videor
Datasheet
1.STV2310D.pdf
(113 pages)
Specifications of STV2310D
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Functional Description
14/113
4
4.1
4.1.1
R_CR
B_CB
FB
CVBS1/Y
CVBS2/Y
G
C
Functional Description
Analog Input Stage
General Description
The Analog Input Stage provides the interface between the incoming video signals and the Analog-
to-Digital Converters (ADC) using Clamp and Automatic Gain Control (AGC) stages to fit the analog
signals to the ADC range.
Several video sources are processed in this stage:
The CVBS/Y signal from the selected input channel goes through an automatic clamp and a
Programmable Gain Amplifier (PGA) circuit. The clamping circuit automatically adjusts the black
level to a programmable A/D output digital code. The clamp voltage is stored on the input coupling
capacitor (22 nF, external to the STV2310). The PGA automatically adjusts the input signal
●
●
●
●
CVBS signals from a broadcast signal or the SCART connector.
S-Video (Y/C) signals coming from an external video source (VCR, DVD, STB).
RGB signals with Fast Blanking (FB) input coming from the SCART connector.
Analog YCrCb signals coming from a DVD player (1H interlaced).
Figure 5: Analog Input Stage Functional Block Diagram
Composite and Luminance Input Channels
Chrominance Input Channel
RGB and Fast Blanking Input Channels
ADC Bias 2
Analog
Switch
Controller
Controller
Controller
Chroma Bias
CVBS Clamp
Control
R_CR Clamp Control
B_CB Clamp Control
G Clamp Control
ADC Bias 1
PGA
Anti-Aliasing Filter
±6 dB
Interpolator
6-bit
10-bit
8-bit
ADC
8-bit
ADC
ADC
8-bit
ADC
8-bit
ADC
STV2310