STV2310D STMicroelectronics, STV2310D Datasheet - Page 80

• Manufacturer Part Number: STV2310D
• Description: Video ICs Digital Video Decodr
• Manufacturer: STMicroelectronics
• Type: High Quality front end videor

Specifications of STV2310D

• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-64
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register List
80/113
CLAMP_PROP[1:
0]
CLAMP_DER[1:0]
Bit 3
CLAMP_INT[2:0]
Address (hex): 2Bh
Reset Value (bin): 0110 0011
Bits [7:0]
Address (hex): 2Ch
Reset Value (bin): 1000 0010
Bits [7:0]
Bit Name
Bit Name
Bit Name
Bit 7
Bit 7
DDECCONT2B
DDECCONT2C
Bit 6
Bit 6
Proportional Gain Selection
This register is related to the CVBS clamp regulation algorithm where a PID filter is used. CLAMP_PROP
defines the Proportional Gain selection.
00: Proportional Gain divided by 64
01: Proportional Gain divided by 32
Defines the Clamp Derivate selection.
00 : 1
01 : 1/2
Reserved. Must be set to 0.
Clamp Integral Gain Configuration
This bitfield is related to the CVBS clamp regulation algorithm where a PID filter is used. This bitfield
provides the integral gain selection. The entry is coded as follows:
000: Divided by 64
111: Divided by 5192
Reserved. Must be set to 0110 0011.
Reserved. Must be set to 1000 0010.
Bit 5
Bit 5
Register Description
Register Description
10 : 1/4
11 : 0
Bit 4
Bit 4
Bit 3
Bit 3
Function
Function
Function
10: Proportional Gain divided by 16
11: Proportional Gain divided by 8
Bit 2
Bit 2
Bit 1
Bit 1
STV2310
Bit 0
Bit 0