STV2310D STMicroelectronics, STV2310D Datasheet - Page 77
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STV2310D
Manufacturer Part Number
STV2310D
Description
Video ICs Digital Video Decodr
Manufacturer
STMicroelectronics
Type
High Quality front end videor
Datasheet
1.STV2310D.pdf
(113 pages)
Specifications of STV2310D
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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STV2310
HSYNCSHIFT_D
EL[1:0]
HSYNCSHIFT_E
N
Address (hex): 23h
Reset Value (bin): 1010 1010
Bits [7:4]
Bits [3:0]
Address (hex): 24h
Reset Value (bin): 1000 0111
Bits [7:4]
Bits [3:1]
Bit 0
Address (hex): 25h
Reset Value (bin): 1001 0100
Bit Name
Bit Name
Bit Name
Bit 7
Bit 7
Bit 7
DDECCONT23
DDECCONT24
DDECCONT25
Bit 6
Bit 6
Bit 6
MAX_PJ_AMP[3:0]
This register allows a programmable delay of HSYNC output signal. This register is only active when
o_hsyncshift_en is active (see register DDECCONT22[0]).
00: (no details yet)
Output Synchronisation shift enable
0: No delay (Default)
1: HSYNC is delayed with respect to the digital ouput.
Note that this feature has not been decided yet.
Reserved. Must be set to 1010.
Reserved. Must be set to 1010.
Reserved. Must be set to 1000.
Reserved. Must be set to 011.
Reserved. Must be set to 1.
Bit 5
Bit 5
Bit 5
Register Description
Register Description
Register Description
Bit 4
Bit 4
Bit 4
HSYNC_
Bit 3
Bit 3
Bit 3
SAV
Function
Function
Function
ERR_THRESHOLD[2:0]
Bit 2
Bit 2
Bit 2
NOISE_THRESHOLD[2:0]
Bit 1
Bit 1
Bit 1
Register List
PJ_EN
Bit 0
Bit 0
Bit 0
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