STV2310D STMicroelectronics, STV2310D Datasheet - Page 96

Video ICs Digital Video Decodr

STV2310D

Manufacturer Part Number
STV2310D
Description
Video ICs Digital Video Decodr
Manufacturer
STMicroelectronics
Type
High Quality front end videor
Datasheet

Specifications of STV2310D

Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Register List
96/113
5.4
VBI_EQUALCOE
FF[2:0]
Bit 4
Bits [3:0]
Address (hex): 54h
Reset Value (bin): 0001 0010
Bit 7
Bit 6
Bit 5
Bit 4
Bits [3:0]
Address (hex): 7Eh - Write Only
Reset Value (bin): 0000 0000
INTERDET_
Bit Name
Bit Name
Bit 7
Bit 7
ACK
VBICONT18
Acknowledge Registers
The acknowledge registers are used to acknowledge the interruption source. When ACK = 1, the
I²C master acknowledges the corresponding interrupt.
Warning : These 2 registers can be written by the I2C but can't be read. Each bit is reset by the I2C
slave (stv2310) one clock period after an high level has been detected.
DDECCONTFE
VCRDET_A
Bit 6
Bit 6
These bits select precomputed coefficients for the equaliser or let the equaliser select automatically the
best set of coefficients or impose to the equaliser the sets of coefficients programmed
000: use set 1 of coefficients
001: use set 2 of coefficients
010: use set 3 of coefficients (central or no equaliser)
011: use set 4 of coefficients
100: equaliser in automatic mode
101: use set 5 of ceofficients
110: use programmed registers (see registers VBICONT0D and VBICONT0E) for the equaliser coefficients.
Reserved. Must be set to 1.
Reserved. Must be set to 0000.
Reserved. Must be set to 0.
Reserved. Must be set to 0.
Reserved. Must be set to 0.
Reserved. Must be set to 1.
Reserved. Must be set to 0010.
CK
INSERDET_
Bit 5
Bit 5
ACK
Register Description
Register Description
FBDET_AC
Bit 4
Bit 4
K
PLLLOCK_A
Bit 3
Bit 3
Function
Function
CK
VLOCK_AC
Bit 2
Bit 2
K
HLOCK_AC
Bit 1
Bit 1
K
TVSTDID_AC
STV2310
Bit 0
Bit 0
K

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