DJLXT6282LE.A3 Intel, DJLXT6282LE.A3 Datasheet - Page 47

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DJLXT6282LE.A3

Manufacturer Part Number
DJLXT6282LE.A3
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT6282LE.A3

Lead Free Status / RoHS Status
Not Compliant
Datasheet
DRETCKREF rising edge to TCLKi rising/falling edge
TCLKi rising/falling edge to TPOSDi and TNEGDi
RPOSDi and RNEGDi setup time
to RCLKi rising/falling edge
RPOSDi and RNEGDi hold time
from RCLKi rising/falling edge
RCLKi
RPOSDi
RNEGDi
Global Conf. Register @ 0xAF / bit #6 :
1. i = [0 to 7] and corresponds to the eight different E1 channel numbers
2. Considering outputs with a 25pF load
Global Conf. Register @ AFH / bit #5 :
1. i = [0 to 7] and corresponds to the eight different E1 channel numbers
DRETCKREF
TCLKi
TPOSDi
TNEGDi
Figure 6. E1 outputs, transmitted to the LIUs, Timing
Table 7. E1 outputs, transmitted to the LIUs, Timing Parameters
Figure 7. E1 inputs, received from the LIUs, Timing
Table 8. E1 inputs, received from the LIUs,Timing Parameters
t
TCKOpd
t
TDOpd
t
RDIsu
Parameter
Parameter
t
RDIh
CnfRxClkIn = 0
CnfTxClkOut = 0
1
Symbol
t
t
RDIsu
RDIh
t
t
TCKOpd
Symbol
TCKOpd
t
t
TDOpd
TDOpd
t
RDIsu
2
Min
2
1
4
Min
3
1
t
Typ
RDIh
CnfRxClkIn = 1
Typ
CnfTxClkOut = 1
Max
Max
11
8
GIBRALTAR
ns
ns
LXT6282
_
DRAWING
DS
Unit
ns
ns
_
R
1.0.
Unit
1 - 10/21/98
FM
- 6/15/98
47

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