ISP1508BET STEricsson, ISP1508BET Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/6/636/stericsson_sml.jpg)
ISP1508BET
Manufacturer Part Number
ISP1508BET
Description
Manufacturer
STEricsson
Datasheet
1.ISP1508BET.pdf
(87 pages)
Specifications of ISP1508BET
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NXP Semiconductors
5. Block diagram
ISP1508A_ISP1508B_2
Product data sheet
Fig 1.
INTERFACE
ULPI
Block diagram
CHIP_SEL
REG1V8
REG3V3
V
CLOCK
XTAL2
XTAL1
CC(I/O)
DATA
CFG0
CFG1
CFG2
NXT
V
[7:0]
STP
DIR
CC
8
GLOBAL
CLOCKS
F6
A4
E5
D6
D5
C3
E1
B4
B3
F5
B2, B5
E3
F3
C6, B6, A6,
A5, A3, A2,
A1, B1
E6
REGULATOR
internal power
DDR OR SDR
interface voltage
VOLTAGE
CONTROLLER
FREQUENCY
SELECTION
SELECTION
OSCILLATOR
INTERFACE
Rev. 02 — 13 March 2008
REGISTER
CRYSTAL
CLOCK
PLL
ULPI
MAP
DATA0
DATA1
C5, D2, E4
POWER-ON
ISP1508
GND
RESET
DESERIALIZER
SERIALIZER
USB DATA
USB DATA
BUFFER
UART
V
TEST_N
ISP1508A; ISP1508B
REF
C4
POR
AND DISCHARGE
COMPARATORS
OTG MODULE
SRP CHARGE
DETECTOR
TERMINATION
RESISTORS
REFERENCE
RESISTORS
HI-SPEED
BAND GAP
USB ATX
CONTROL
VOLTAGE
POWER
V
PORT
ID
ULPI HS USB OTG transceiver
BUS
004aaa862
F1, F2
© NXP B.V. 2008. All rights reserved.
D3
D4
C2
F4
D1
C1
E2
PSW_N
FAULT
RREF
DP
n.c.
ID
V
DM
BUS
4 of 86
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