ISP1761BEGE STEricsson, ISP1761BEGE Datasheet - Page 155

• Manufacturer Part Number: ISP1761BEGE
• Manufacturer: STEricsson

Specifications of ISP1761BEGE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

21. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Adjusting analog overcurrent detection limit
Fig 11. Internal power-on reset timing . . . . . . . . . . . . . . .31
Fig 12. Clock with respect to the external power-on
Fig 13. HNP sequence of events . . . . . . . . . . . . . . . . . . .87
Fig 14. Dual-role A-device state diagram. . . . . . . . . . . . .89
Fig 15. Dual-role B-device state diagram. . . . . . . . . . . . .90
Fig 16. Charge pump current versus voltage at various
Fig 17. Charge pump current versus voltage at various
Fig 18. USB source differential data-to-EOP transition skew
Fig 19. Register or memory write. . . . . . . . . . . . . . . . . .135
Fig 20. Register read . . . . . . . . . . . . . . . . . . . . . . . . . . .136
Fig 21. Register access . . . . . . . . . . . . . . . . . . . . . . . . .136
Fig 22. Memory read . . . . . . . . . . . . . . . . . . . . . . . . . . .137
Fig 23. DMA read (single cycle). . . . . . . . . . . . . . . . . . .138
Fig 24. DMA write (single cycle) . . . . . . . . . . . . . . . . . .139
Fig 25. DMA read (multi-cycle burst) . . . . . . . . . . . . . . .140
Fig 26. DMA write (multi-cycle burst) . . . . . . . . . . . . . . .141
Fig 27. ISP1761 register access timing: separate address
Fig 28. PIO register access . . . . . . . . . . . . . . . . . . . . . .143
Fig 29. DMA read or write . . . . . . . . . . . . . . . . . . . . . . .144
Fig 30. Package outline SOT425-1 (LQFP128) . . . . . . .146
Fig 31. Package outline SOT857-1 (TFBGA128) . . . . .147
CD00222703
Product data sheet
diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
(optional) and EOS protection . . . . . . . . . . . . . . .30
reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
temperatures (worst case) . . . . . . . . . . . . . . . . .132
temperatures (typical case) . . . . . . . . . . . . . . . .132
and EOP width . . . . . . . . . . . . . . . . . . . . . . . . . .134
and data buses (8051 style). . . . . . . . . . . . . . . .142
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin configuration (LQFP128); top view . . . . . . . . .6
Pin configuration (TFBGA128); top view . . . . . . . .6
Internal hub . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
ISP1761 clock scheme . . . . . . . . . . . . . . . . . . . .15
Memory segmentation and access block
ISP1761 power supply connection . . . . . . . . . . .27
Most commonly used power supply connection .28
Hybrid mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Rev. 09 — 15 April 2010
Hi-Speed USB OTG controller
© ST-ERICSSON 2010. All rights reserved.
ISP1761
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