XC5VLX50-1FFG676I Xilinx Inc, XC5VLX50-1FFG676I Datasheet - Page 160

• Manufacturer Part Number: XC5VLX50-1FFG676I
• Description: FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 676-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG676I

• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 440
• Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 1769472
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 4: Block RAM
X-Ref Target - Figure 4-28
160
ECCPARITY[7:0]
WRADDR[8:0]
RDADDR[8:0]
DBITERR
Top-Level View of the Block RAM ECC Architecture
SBITERR
DOP[7:0]
DO[63:0]
DIP[7:0]
DI[63:0]
Figure 4-28
DO_REG
DO_REG
DO_REG
DO_REG
0
1
64
0
1
0
1
0
1
Figure 4-28: Top-Level View of Block RAM ECC
8
Q D
Q D
Q D
Q D
shows the top-level view of a Virtex-5 FPGA block RAM in ECC mode.
Encode
64-bit
ECC
EN_ECC_READ
EN_ECC_READ
64
wraddr
rdaddr
1
1
8
www.xilinx.com
1
0
0
1
0
1
0
1
8
Data In
64
64
1
1
8
8
8
EN_ECC_WRITE
Decode
Correct
and
0
1
Parity
Out
Data
Out
64
64
9
9
8
8
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM
512 x 72
UG190_c4_25_022609