XC5VLX50-1FFG676I Xilinx Inc, XC5VLX50-1FFG676I Datasheet - Page 201

• Manufacturer Part Number: XC5VLX50-1FFG676I
• Description: FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 676-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG676I

• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 440
• Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 1769472
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
General Slice Timing Model and Parameters
A simplified Virtex-5 FPGA slice is shown in
omitted for clarity. Only the elements relevant to the timing paths described in this section
are shown.
X-Ref Target - Figure 5-25
Inputs
Inputs
Inputs
Inputs
REV
(DX)
CLK
DX
CX
CE
SR
BX
AX
D
C
B
A
6
6
6
6
LUT
LUT
LUT
LUT
O6
O5
O6
O5
O6
O5
O6
O5
Figure 5-25: Simplified Virtex-5 FPGA Slice
www.xilinx.com
F7BMUX
F7AMUX
F8MUX
Figure
5-25. Some elements of the slice are
CLB / Slice Timing Models
D
CE
CLK
D
CE
CLK
D
CE
CLK
D
CE
CLK
SR REV
SR REV
SR REV
SR REV
FE/LAT
FE/LAT
FE/LAT
FE/LAT
Q
Q
Q
Q
UG190_5_25_050506
D
DMUX
DQ
C
CMUX
CQ
B
BMUX
BQ
A
AMUX
AQ
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