XC5VLX50-1FFG676I Xilinx Inc, XC5VLX50-1FFG676I Datasheet - Page 207

• Manufacturer Part Number: XC5VLX50-1FFG676I
• Description: FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 676-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG676I

• Package: 676FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 440
• Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 1769472
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Slice SRL Timing Model and Parameters (Available in SLICEM only)
Figure 5-29
elements of the slice have been omitted for clarity. Only the elements relevant to the timing
paths described in this section are shown.
X-Ref Target - Figure 5-29
illustrates shift register implementation in a Virtex-5 FPGA slice. Some
D address
C address
B address
A address
CLK
Figure 5-29: Simplified Virtex-5 FPGA Slice SRL
DX
CX
BX
AX
W
www.xilinx.com
6
6
6
6
DI1
A
DI1
A
DI1
A
DI1
A
CLK
CLK
CLK
CLK
SRL
SRL
SRL
SRL
MC31
MC31
MC31
MC31
WE
WE
WE
WE
O6
O6
O6
O6
CLB / Slice Timing Models
UG190_5_29_050506
D
C
B
A
DMUX
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