ISP1161A1BMGA STEricsson, ISP1161A1BMGA Datasheet - Page 40

• Manufacturer Part Number: ISP1161A1BMGA
• Manufacturer: STEricsson

Specifications of ISP1161A1BMGA

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

ISP1161A1_5
Product data sheet
Fig 35. Using internal OC detection circuit.
‘n’ represents the downstream port number (n = 1 or 2)
V OC = + 5 V − V BUS
V BUS
9.8.1 Using an internal OC detection circuit
downstream
+ 5 V
connector
The internal OC detection circuit can be used only when V
5 V power supply. The HCD must set AnalogOCEnable, bit 10 of the
HcHardwareConfiguration register, to logic 1.
An application using the internal OC detection circuit and internal 15 kΩ pull-down
resistors is shown in
and DownstreamPort15KresistorSel to logic 1. They are bit 10 and bit 12 of the
HcHardwareConfiguration register, respectively.
When H_OCn detects an overcurrent status on a downstream port, H_PSWn will output
HIGH, a logic 1 to turn off the 5 V power supply to the downstream port V
is no such condition, H_PSWn will output LOW, a logic 0 to turn on the 5 V power supply
to the downstream port V
In general applications, you can use a P-channel MOSFET as the power switch for V
Connect the 5 V power supply to the source of the P-channel MOSFET, V
and H_PSWn to the gate. Call the voltage drop across the drain and source the
overcurrent detection voltage (V
voltage comparator has been incorporated with a nominal voltage threshold (ΔV
75 mV. When V
P-channel MOSFET. If the P-channel MOSFET has a R
threshold will be 500 mA. The selection of a P-channel MOSFET with a different R
result in a different overcurrent threshold.
USB
port
MOSFET
P-Ch
47 pF
(2×)
OC
exceeds V
22 Ω
22 Ω
Rev. 05 — 29 September 2009
Figure
H_PSWn
H_OCn
BUS
V CC
H_DMn
H_DPn
35. In this example, the HCD must set both AnalogOCEnable
.
trip
, H_PSWn will output a HIGH level, logic 1 to turn off the
OC
). For the internal overcurrent detection circuit, a
OC detect
regulator
≥
15 kΩ
USB single-chip host and device controller
(2×)
bit 12
Configuration
HcHardware
ATX
OC select
1
0 Reg
PSW
C/L
DSon
CC
HC CORE
of 150 mΩ, the overcurrent
ISP1161A1
(pin 56) is connected to a
SIE
Configuration
HcHardware
ISP1161A1
© ST-ERICSSON 2009. All rights reserved.
bit 10
BUS
BUS
004aaa182
. When there
to the drain,
trip
DSon
40 of 137
) of
BUS
will
.