ISP1161A1BMGA STEricsson, ISP1161A1BMGA Datasheet - Page 59

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ISP1161A1BMGA

Manufacturer Part Number
ISP1161A1BMGA
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BMGA

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Table 32.
ISP1161A1_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhStatus register: bit allocation
CRWE
DRWE
R/W
31
23
15
W
R
R
0
0
0
7
0
Table 33.
Bit
31
30 to 18
17
16
15
30
22
14
R
R
R
R
0
0
0
6
0
HcRhStatus register: bit description
Symbol
CRWE
-
OCIC
LPSC
DRWE
29
21
13
R
R
R
R
0
0
0
5
0
Rev. 05 — 29 September 2009
reserved
reserved
Description
On write—ClearRemoteWakeupEnable: Writing a logic 1 clears
DeviceRemoveWakeupEnable. Writing a logic 0 has no effect.
reserved
OverCurrentIndicatorChange: This bit is set by hardware when a
change has occurred to the OCI field of this register. The HCD clears
this bit by writing a logic 1. Writing a logic 0 has no effect.
On read—LocalPowerStatusChange: The Root Hub does not
support the local power status feature. Therefore, this bit is always
read as logic 0.
On write—SetGlobalPower: In global power mode
(PowerSwitchingMode=0), this bit is written to logic 1 to turn on power
to all ports (clear PortPowerStatus). In per-port power mode, it sets
PortPowerStatus only on ports whose bit PortPowerControlMask is not
set. Writing a logic 0 has no effect.
On read—DeviceRemoteWakeupEnable: This bit enables the bit
ConnectStatusChange as a resume event, causing a state transition
USBSuspend to USBResume and setting the ResumeDetected
interrupt.
0 — ConnectStatusChange is not a remote wake-up event
1 — ConnectStatusChange is a remote wake-up event
On write—SetRemoteWakeupEnable: Writing a logic 1 sets
DeviceRemoveWakeupEnable. Writing a logic 0 has no effect.
28
20
12
R
R
R
R
0
0
0
4
0
reserved
reserved
USB single-chip host and device controller
27
19
11
R
R
R
R
0
0
0
3
0
26
18
10
R
R
R
R
0
0
0
2
0
ISP1161A1
© ST-ERICSSON 2009. All rights reserved.
OCIC
R/W
OCI
25
17
R
R
R
0
0
9
0
1
0
LPSC
R/W
LPS
R/W
59 of 137
24
16
R
R
0
0
8
0
0
0

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