LSI53CF92A-64QFP LSI, LSI53CF92A-64QFP Datasheet - Page 76
LSI53CF92A-64QFP
Manufacturer Part Number
LSI53CF92A-64QFP
Description
Manufacturer
LSI
Datasheet
1.LSI53CF92A-64QFP.pdf
(158 pages)
Specifications of LSI53CF92A-64QFP
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Register: 0x09
Clock Conversion
Write Only
Register Bank 0
This register must be set according to the CLK (Clock) input frequency.
All timings longer than 400 ns depend on this register correctly agreeing
with the CLK frequency. The clock conversion factor is equal to the
binary encoded version of the least significant three bits. It should be set
to one of the seven values shown in
Table 4.7
These bits must never be loaded with a binary 0b001. Hardware Reset
or the Reset command sets the Clock Conversion Factor to a binary
0b010. The upper five bits of this register are reserved.
Registers
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
CLK Frequency (MHz)
7
x
Note:
10.01 to 15
15.01 to 20
20.01 to 25
25.01 to 30
30.01 to 35
35.01 to 40
10
CLK Frequency vs. Clock Conversion Factor
A Clock Conversion factor of 0b000 indicates eight clocks.
x
R
x
Clock Conversion Factor
x
Default
0b010
0b011
0b100
0b101
0b110
0b111
0b000
Table
3
x
4.7.
2
0
Clock Conversion Bits
1
0
0
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