MC9S08QG8CPBE Freescale, MC9S08QG8CPBE Datasheet - Page 204

• Manufacturer Part Number: MC9S08QG8CPBE
• Manufacturer: Freescale

Specifications of MC9S08QG8CPBE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 12
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 16
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Lead Free Status / RoHS Status: Compliant

Serial Communications Interface (S08SCIV3)
14.2.5
This register has one read-only status flag. Writes have no effect.
14.2.6
202
Reset
Reset
BRK13
Field
Field
RAF
R8
T8
2
0
7
6
W
W
R
R
SCI Status Register 2 (SCIS2)
SCI Control Register 3 (SCIC3)
Break Character Length — BRK13 is used to select a longer break character length. Detection of a framing
error is not affected by the state of this bit.
0 Break character is 10 bit times (11 if M = 1)
1 Break character is 13 bit times (14 if M = 1)
Receiver Active Flag — RAF is set when the SCI receiver detects the beginning of a valid start bit, and RAF is
cleared automatically when the receiver detects an idle line. This status flag can be used to check whether an
SCI character is being received before instructing the MCU to go to stop mode.
0 SCI receiver idle waiting for a start bit.
1 SCI receiver active (RxD input not idle).
Ninth Data Bit for Receiver — When the SCI is configured for 9-bit data (M = 1), R8 can be thought of as a ninth
receive data bit to the left of the MSB of the buffered data in the SCID register. When reading 9-bit data, read R8
before reading SCID because reading SCID completes automatic flag clearing sequences which could allow R8
and SCID to be overwritten with new data.
Ninth Data Bit for Transmitter — When the SCI is configured for 9-bit data (M = 1), T8 may be thought of as a
ninth transmit data bit to the left of the MSB of the data in the SCID register. When writing 9-bit data, the entire
9-bit value is transferred to the SCI shift register after SCID is written so T8 should be written (if it needs to change
from its previous value) before SCID is written. If T8 does not need to change in the new value (such as when it
is used to generate mark or space parity), it need not be written each time SCID is written.
R8
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
T8
0
0
0
6
6
Table 14-7. SCIC3 Register Field Descriptions
Table 14-6. SCIS2 Register Field Descriptions
Figure 14-11. SCI Control Register 3 (SCIC3)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Figure 14-10. SCI Status Register 2 (SCIS2)
TXDIR
0
0
0
5
5
TXINV
0
0
0
4
4
Description
Description
ORIE
3
0
0
3
0
BRK13
NEIE
0
0
2
2
Freescale Semiconductor
FEIE
0
0
0
1
1
PEIE
RAF
0
0
0
0