ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 386
ALXD800EEXJ2VD C3
Manufacturer Part Number
ALXD800EEXJ2VD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJ2VD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJ2VD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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6.6.23.4 WriteMemoryAperture
CRTC Index
Type
Reset Value
6.6.23.5 ReadMemoryAperture
CRTC Index
Type
Reset Value
6.6.23.6 BlinkCounterCtl
CRTC Index
Type
Reset Value
This register is for simulation and test only.
386
Bit
7:0
Bit
7:0
Bit
6:5
4:0
7
Name
WR_BASE
Name
RD_BASE
Name
HLD_CNT
RSVD
BLNK_CNT
047h
R/W
00h
048h
R/W
00h
060h
R/W
00h
33234H
Description
WriteBase. Offset added to the graphics memory base to specify where VGA write oper-
ations start. This value provides DWORD address bits [21:14] when mapping host VGA
writes to graphics memory. This allows the VGA base address to start on any 64 KB
boundary within the 8 MB of graphics memory.
Description
ReadBase. Offset added to the graphics memory base to specify where VGA read oper-
ations start. This value provides DWORD address bits [21:14] when mapping host VGA
reads to graphics memory. This allows the VGA base address to start on any 64 KB
boundary within the 8 MB of graphics memory.
Description
Hold Count. When set, prevents the blink counter from incrementing with each leading
edge VSYNC.
Reserved.
Blink Count. The blink counter is loaded with this value while the Sequencer Reset reg-
ister is in the reset state.
WriteMemoryAperture Register Bit Descriptions
ReadMemoryAperture Register Bit Descriptions
BlinkCounterCtl Register Bit Descriptions
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
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