ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 40

• Manufacturer Part Number: ALXD800EEXJ2VD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

3.4.6
40
Signal Name
DRGB[31:24]
DRGB[23:0]
DOTCLK
HSYNC
VSYNC
DISPEN
VDDEN
LDEMOD
MSGSTART
MSGSTOP
VID[15:8]
VOP[15:0]
VOPCLK
VOP_BLANK
VOP_HSYNC
VOP_VSYNC
TFT Display Interface Signals
See Table
See Table
See Table
Ball No.
33234H
page 30
page 30
page 30
3-6 on
3-6 on
3-6 on
AH11
AJ11
AD3
AD4
AD3
AE1
AE3
AE4
AE2
AE1
AE4
AE3
Type
(PD)
(PD)
(PD)
(PD)
(PD)
(PD)
(PD)
(PD)
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
0-162 Mb/s
0-162 Mb/s
0-162 Mb/s
0-162 Mb/s
0-162 Mb/s
0-162 Mb/s
0-162 MHz
0-75 Mb/s
0-75 Mb/s
0-75 Mb/s
0-75 Mb/s
0-75 Mb/s
0-75 Mb/s
0-75 Mb/s
0-75 MHz
f
(5vt)
(5vt)
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
V
Description
Display Data Bus.
Dot Clock. Output clock from DOTCLK PLL.
Horizontal Sync. Horizontal Sync establishes
the line rate and horizontal retrace interval for an
attached flat panel. The polarity is programmable
(See Section 6.8.3.43 on page 451, VP Memory
Offset 400h[29]).
Vertical Sync. Vertical Sync establishes the
screen refresh rate and vertical retrace interval
for an attached flat panel. The polarity is pro-
grammable (See Section 6.8.3.43 on page 451,
VP Memory Offset 400h[30]).
Flat Panel Backlight Enable.
LCD VDD FET Control. When this output is
asserted high, V
panel. This signal is intended to control a power
FET to the LCD panel. The FET may be internal
to the panel or not, depending on the panel man-
ufacturer.
Flat Panel Display Enable (TFT Panels).
Message Start. Used in VIP message passing
mode to indicate start of message.
Message Stop. Used in VIP message passing
mode to indicate end of message.
Video Input Port Data. When in 16 bit VIP
mode, these are the eight MSBs of the VIP data.
Video Output Port Data. VOP output data.
Video Output Port Clock.
Video Output Port Blank.
Video Output Port Horizontal Sync.
Video Output Port Vertical Sync.
AMD Geode™ LX Processors Data Book
DD
voltage is applied to the
Signal Definitions