ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 549

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ALXD800EEXJ2VD C3

Manufacturer Part Number
ALXD800EEXJ2VD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
GeodeLink™ Control Processor Register Descriptions
6.14.2.7 GLCP DOWSER (GLCP_DOWSER)
MSR Address
Type
Reset Value
6.14.2.8 GLCP I/O Delay Controls (GLCP_DELAY_CONTROLS)
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:0
Bit
63
62
61
60
Bit
Name
EN
B_DQ
B_CMD
B_MA
Name
---
4C00000Eh
R/W
00000000_00000000h
4C00000Fh
R/W
00000000_00000000h
Description
Software Defined. This 64-bit scratchpad register was specifically added for SW
debugger use (DOWSER). The register resets to zero with both hard and soft resets.
Description
0: Use default values.
1: Use value in bits [62:0].
Buffer Control for DQ[63:0], DQS[7:0], DQM[7:0], TLA[1:0] drive select.
1: Half power.
0: Quarter power.
Buffer Control for RAS[1:0]#, CAS[1:0]#, CKE[1:0], CS[3:0]#, WE[1:0]# drive select.
1: Half power.
0: Quarter power.
Buffer Control for MA[13:0] and BA[1:0].
0: Half power.
1: Full power.
GLCP_DELAY_CONTROLS Register Map
GLCP_DELAY_CONTROLS Bit Definition
GLCP_DOWSER Bit Descriptions
GLCP_DOWSER Register Map
SW Defined
SW Defined
9
9
RSVD
8
8
33234H
7
7
6
6
5
5
4
4
3
3
2
2
1
1
549
0
0

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