PNX1300EH NXP Semiconductors, PNX1300EH Datasheet - Page 198

PNX1300EH

Manufacturer Part Number
PNX1300EH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1300EH

Lead Free Status / RoHS Status
Not Compliant

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PNX1300/01/02/11 Data Book
12.17.1.4 256-Mbit Devices
256-Mbit SDRAMs organized in x16 can be used to build
a 64-MB memory systems.
Note the connections described in
256-Mbit SDRAMs organized in x16 can also be used to
connect the 128-Mbit SDRAM devices organized in x16
allowing the same footprint on the board for two different
12-16
Figure 12-12. Schematic of a 64-MB memory system consisting of two 4×4M×16 SDRAM chips (one rank)
PRELIMINARY SPECIFICATION
Figure 12-12
MM_CLK[0]
MM_CLK[1]
Figure 12-12
details a 64-MB
Address[12:0]
Address[12:0]
CLK
Control
CLK
Control
BA[1:0]
BA[1:0]
for the
PNX1300
4×4M×16
4×4M×16
SDRAM
SDRAM
memory system. MM_CONFIG.SIZE must be set to 7
(i.e. 32-MB rank size,
memory size configurations (i.e. 64 MB or 32 MB). Refer
to
case.
DQM[1:0]
DQM[1:0]
DQ[15:0]
DQ[15:0]
Figure 12-10
CS#
CS#
GND
GND
MM_DQ[31:16]
MM_DQM[3:2]
MM_DQM[1:0]
MM_DQ[15:0]
for detailed connection of the 32-MB
Section
Philips Semiconductors
12.6.1).

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