PNX1300EH NXP Semiconductors, PNX1300EH Datasheet - Page 369

• Manufacturer Part Number: PNX1300EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1300EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
h_st32d
SYNTAX
FUNCTION
DESCRIPTION
The d value is an opcode modifier, must be in the range –256 and 252 inclusive, and must be a multiple of 4. This
store operation is performed as little-endian or big-endian depending on the current setting of the bytesex bit in the
PCSW.
h_st32d
the TRPMSE (TRaP on Misaligned Store Exception) bit in PCSW is 1, exception processing will be requested on the
next interruptible jump.
modification of the addressed memory locations (and the modification of cache if the locations are cacheable). If the
LSB of rguard is 1, the store takes effect. If the LSB of rguard is 0,
particular, the LRU and other status bits in the data cache are not affected.
EXAMPLES
A-71
r10 = 0xcfc, r80 = 0x44332211
r50 = 0, r20 = 0xd0b,
r70 = 0xaabbccdd
r60 = 1, r30 = 0xd0c,
r70 = 0xaabbccdd
The
If
The
[ IF rguard ] h_st32d(d) rsrc1 rsrc2
if rguard then {
}
h_st32d
if PCSW.bytesex = LITTLE_ENDIAN then
else
mem[rsrc2 + d + (3 ⊕ bs)] ← rsrc1<7:0>
mem[rsrc2 + d + (2 ⊕ bs)] ← rsrc1<15:8>
mem[rsrc2 + d + (1 ⊕ bs)] ← rsrc1<24:16>
mem[rsrc2 + d + (0 ⊕ bs)] ← rsrc1<31:24>
h_st32d
h_st32d
bs ← 3
bs ← 0
is undefined, and the MSE (Misaligned Store Exception) bit in the PCSW register is set to 1. Additionally, if
Initial Values
is misaligned (the memory address computed by rsrc2 + d is not a multiple of 4), the result of
operation stores all 32 bits of rsrc1 into the memory locations pointed to by the address in rsrc2 + d.
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
h_st32d(4) r80 r10
IF r50 h_st32d(–8) r70 r20
IF r60 h_st32d(–8) r70 r30
Operation
Hardware 32-bit store with displacement
h_st32d
[0xd00] ← 0x44, [0xd01] ← 0x33,
[0xd02] ← 0x22, [0xd03] ← 0x11
no change, since guard is false
[0xd04] ← 0xaa, [0xd05] ← 0xbb,
[0xd06] ← 0xcc, [0xd07] ← 0xdd
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
st32 st32d st16 st16d st8
has no side effects whatever; in
st8d readpcsw ijmpf
Philips Semiconductors
ATTRIBUTES
SEE ALSO
Result
–256..252 by 4
dmem
7 bits
4, 5
n/a
31
2