MT46H64M16LFCK-75:A TR Micron Technology Inc, MT46H64M16LFCK-75:A TR Datasheet - Page 73
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT46H64M16LFCK-75:A TR
Manufacturer Part Number
MT46H64M16LFCK-75:A TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H64M16LFCK-75A_TR.pdf
(96 pages)
Specifications of MT46H64M16LFCK-75:A TR
Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
105mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 37: Random WRITE Cycles
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
Address
DQ
DQS
CK#
DM
CK
3,4
Notes:
WRITE
Bank,
Col b
T0
1,2
1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. D
4. b' (or x, n, a, g) = the next data-in following D
t
DQSS (NOM)
med burst order.
IN
b (or x, n, a, g) = data-in for column b (or x, n, a, g).
WRITE
Bank,
Col x
D
T1
b
IN
1,2
T1n
D
b’
IN
WRITE
Bank,
Col n
T2
D
x
IN
1,2
73
T2n
D
x’
IN
WRITE
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col a
T3
D
n
IN
1,2
T3n
D
Don’t Care
n’
IN
IN
b (x, n, a, g) according to the program-
WRITE
Bank,
Col g
T4
D
a
IN
1,2
T4n
D
a’
IN
Transitioning Data
© 2007 Micron Technology, Inc. All rights reserved.
WRITE Operation
NOP
D
T5
g
IN
T5n
D
g’
IN
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