MT46H64M16LFCK-75:A TR Micron Technology Inc, MT46H64M16LFCK-75:A TR Datasheet - Page 91
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT46H64M16LFCK-75:A TR
Manufacturer Part Number
MT46H64M16LFCK-75:A TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H64M16LFCK-75A_TR.pdf
(96 pages)
Specifications of MT46H64M16LFCK-75:A TR
Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
105mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 52: Deep Power-Down Mode
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Command
CKE
CK#
CK
All banks idle with no
activity on the data bus
1
Notes:
NOP
T0
1. Clock must be stable prior to CKE going HIGH.
2. DPD = deep power-down.
3. Upon exit of deep power-down mode, a full DRAM initialization sequence is required.
t
IS
DPD
T1
Enter deep power-down mode
2
T2
(
(
(
)
(
)
(
t
)
)
)
(
CKE
(
(
(
)
(
)
)
)
)
91
Ta0
1
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
Ta1
Exit deep power-down mode
T = 200µs
© 2007 Micron Technology, Inc. All rights reserved.
Ta2
NOP
Power-Down
Don’t Care
Ta3
PRE
3
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