ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 127

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
9.2.7
Address: 0F035H
Access: R/W
Access size: 8-bit
Initial value: 00H
TM1C is a special function register (SFR) that functions as an 8-bit binary counter.
When write operation to TM1C is performed, TM1C is set to “00H”. The data that is written is meaningless.
In 16-bit timer mode, if write operation is performed to either the low-order TM0C or high-order TM1C, both the low
order and the high order are set to “0000H”.
When reading TM1C in 16-bit timer mode, be sure to read TM0C first since the count value of TM1C is stored in the
TM1C latch when TM0C is read.
During timer operation, the TM1C content may not be read depending on the conditions of the timer clock and the
system clock.
Table 9-2 shows whether a TM1C read is enabled or disabled during timer operation for each condition of the timer
clock and system clock.
Initial value
External clock
Timer clock
TM1C
Timer 1 Counter Register (TM1C)
R/W
HTBCLK
HTBCLK
LSCLK
LSCLK
T1CK
T1C7
R/W
7
0
Table 9-2 TM1C Read Enable/Disable during Timer Operation
System clock
SYSCLK
HSCLK
HSCLK
HSCLK
LSCLK
LSCLK
LSCLK
T1C6
R/W
6
0
Read enabled.
Read enabled. However, to prevent the reading of undefined data
during incremental counting, read TM1C twice and check that the
results match.
Read disabled.
Read enabled.
Read disabled.
T1C5
R/W
5
0
9-9
T1C4
R/W
4
0
ML610Q407/ML610Q408/ML610Q409 User's Manual
TM1C read enable/disable
T1C3
R/W
3
0
T1C2
R/W
2
0
T1C1
R/W
0
1
Chapter 9 Timer
T1C0
R/W
0
0

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