ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 58

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 4 MCU Control Function
4.3.3.2 STOP Mode When CPU Operates with High-Speed Clock
When the CPU is operating with the high-speed clock and the STP bit of SBYCON is set to “1” with the stop code
acceptor enabled, the STOP mode is entered and high-speed oscillation and low-speed oscillation stop.
When any of the P00 to P04 interrupt request or an external 8 interrupt request occurs with the interrupt enabled
(interrupt enabled flag is "1") state, the STP bit becomes "0" and the high-speed and low-speed oscillation resumes.
When an interrupt request is issued, the STOP mode is released after the elapse of the high-speed oscillation start time
(T
program run mode, and the high-speed clocks (OSCLK and HSCLK) restart supply to the peripheral circuits.
The low-speed clock (LSCLK) restarts supply to the peripheral circuits after the elapse of the low-speed oscillation start
time (T
For the high-speed oscillation start time (T
Characteristics” Section in Appendix C.
Figure 4-4 shows the operation waveforms in STOP mode when CPU operates with the high-speed clock.
High-speed oscillation
Note:
Low-speed oscillation
RC
processing, place two NOP instructions next to the instruction that sets the STP bit to “1”.
Since up to two instructions are executed during the period between STOP mode release and a transition to interrupt
SYSCLK, HSCLK
) and the high-speed clock (OSCLK) oscillation stabilization time (16-pulse count), the mode is returned to the
SBYCON.STP bit
Figure 4-4 Operation Waveforms in STOP Mode When CPU Operates with High-Speed Clock
XTL
) and low-speed clock (LSCLK) oscillation stabilization time (8192 count).
waveform
waveform
Interrupt
OSCLK
request
LSCLK
High-speed oscillation waveform
Program run mode
SYSCLK,HSCLK waveform
OSCLK waveform
XTH
) and low-speed oscillation start time (T
Low-speed
oscillation
Maximum 1
count
STOP mode
4-12
Hiz
T
RC
T
XTL
High-speed oscillation waveform
High-speed oscillation 16 counts
8192 counts
Low-speed
Program run mode
SYSCLK,HSCLK
XTL
OSCLK waveform
), see the “Electrical