ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 386

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Appendix E Check List
This Check List has notes to prevent commonly-made programming mistakes and frequently overlooked or misunderstood
hardware features of the MCU. Check each note listed up chapter by chapter while coding the program or evaluating it using
the MCU.
Chapter 1 Overview
•About unused pins
Chapter 2 CPU and Memory Space
•Program Memory size
[ ] 15,360 Byte (0:0000H to 0:3BFFH)
•Data RAM size
[ ] 1024 Byte (0:E000H to 0:E3FFH)
•Unused area
[ ] Please fill test area 0:3C00H0:3FFFH with BRK instruction code “0FFH” (Refer to a startup file “S61040XSW.asm” for programming in
the source code).
[ ] For fail safe in your system, please fill unused program memory area (your program code does not use) with BRK instruction code
“0FFH”. We will fill the area with the code “0FFH” at Oki semiconductor’s factory programming.
•RAM initialization
[ ]
Chapter 3 Reset
•Reset activation pulse width
[ ]
•Power-on reset occurrence power rise time
[ ]
•Reset status flag
[ ]
•BRK instruction reset
[ ] In system reset by the BRK instruction, no special function register (SFR) is initialized either. Therefore initialize the SFRs
by your software (see Section 3.3.1 in the User's Manual).
Chapter 4 MCU Control Function
•STOP mode
[ ] When the MIE flag is "0", the stop code acceptor (STPACP) cannot be enabled under the condition where both the interrupt enable and
request flags become "1"
[ ] Place two NOP instructions next to the instruction that sets the STP bit to "1"
•HALT mode
[ ] Place two NOP instructions next to the instruction that sets the HLT bit to "1"
•BLKCON register
[ ] BLKCON registers enable or disable corresponsive each peripheral (Refer to Section 4.2.4 - 4.2.8. in the user’s manual).
[ ]
operating clocks for the peripherals stop.
Chapter 5 Interrupts
•Unused interrupt vector table
[ ] Please define all unused interrupt vector tables for fail safe.
•Non-maskable interrupt
[ ] The watchdog timer interrupt (WDTINT) is a non-maskable interrupt that does not depend on MIE flag
5.3 in the User's Manual)
[ ] Please confirm how to handle the unused pins(Refer to Section 1.3.4 in the user’s manual).
The hardware reset does not initialize RAM. Please initialize RAM by the software.
Minimum 200us (Refer to Appendix C-2 in the user's manual)
Maximum 10ms (Refer to Appendix C-2 in the user's manual)
No flag is provided that indicates the occurrence of reset by the RESET_N pin (Refer to section 3.2.2. in the user's manual).
When certain bits of block control registers are set to “1”, corresponding peripherals are reset (all registers are reset) and
(Refer to Sections 4.2.2 and 4.2.3. in the user's manual)
.
Appendix E-1
ML610Q407/ML610Q408/ML610Q409 User's Manual
(Refer to Section 4.3.3. in the user's manual).
(Refer to Section 4.3.2. in the user's manual).
.
(Refer to Sections 5.2.8. and
Appendix E Check List