PCF2129AT/1,512 NXP Semiconductors, PCF2129AT/1,512 Datasheet - Page 30

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PCF2129AT/1,512

Manufacturer Part Number
PCF2129AT/1,512
Description
IC REAL TIME CLK/CALENDAR 20SOIC
Manufacturer
NXP Semiconductors
Type
Clock/Calendar/Alarmr
Datasheets

Specifications of PCF2129AT/1,512

Package / Case
20-SOIC (7.5mm Width)
Date Format
YY-MM-DD-dd
Time Format
HH:MM:SS (12/24 hr)
Interface
I²C, SPI
Voltage - Supply
1.8 V ~ 4.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Clock, Alarm, Watchdog, Timestamp
Supply Voltage (max)
4.2 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
I2C, SPI
Supply Current
800 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4960-5
935288599512
NXP Semiconductors
PCF2129A_2
Product data sheet
8.10.1 Register Watchdg_tim_ctl
8.10.2 Register Watchdg_tim_val
8.10 Timer functions
The PCF2129A has a watchdog timer function. The timer can be switched on and off by
using the control bit WD_CD in the register Watchdg_tim_ctl.
The watchdog timer has four selectable source clocks. It can, for example, be used to
detect a microprocessor with interrupt and reset capability which is out of control (see
Section
To control the timer function and timer output, the registers Control_2, Watchdg_tim_ctl,
and Watchdg_tim_val are used.
Table 30.
[1]
[2]
Table 31.
Bit
7
6
5
4 to 2 -
1 to 0 TF[1:0]
Bit
7 to 0 WATCHDG_TIM_VAL[7:0]
Default value.
When writing to the register this bit has always to be set logic 0.
Symbol
WD_CD
T
TI_TP
Symbol
8.10.3)
Watchdg_tim_ctl - watchdog timer control register (address 10h) bit description
Watchdg_tim_val - watchdog timer value register (address 11h) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
Value
0
1
0
0
1
-
00
01
10
11
[1]
[2]
[1]
[1]
Value
00 to FF countdown period in seconds:
Description
watchdog timer disabled
watchdog timer enabled;
unused
the interrupt pin INT is configured to generate a
permanent active signal when MSF (register Control_2)
is set
the interrupt pin INT is configured to generate a pulsed
signal when MSF flag is set (see
unused
timer source clock for watchdog timer
the interrupt pin INT is activated when timed out
4.096 kHz
64 Hz
1 Hz
1
60
Hz
Description
where n is the countdown value
CountdownPeriod
Integrated RTC, TCXO and quartz crystal
=
-------------------------------------------------------------- -
SourceClockFrequency
PCF2129A
Figure
© NXP B.V. 2010. All rights reserved.
n
19)
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