PCF2129AT/1,512 NXP Semiconductors, PCF2129AT/1,512 Datasheet - Page 9

• Manufacturer Part Number: PCF2129AT/1,512
• Description: IC REAL TIME CLK/CALENDAR 20SOIC
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2129AT/1,512

• Package / Case: 20-SOIC (7.5mm Width)
• Date Format: YY-MM-DD-dd
• Time Format: HH:MM:SS (12/24 hr)
• Interface: I²C, SPI
• Voltage - Supply: 1.8 V ~ 4.2 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock, Alarm, Watchdog, Timestamp
• Supply Voltage (max): 4.2 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C, SPI
• Supply Current: 800 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4960-5; 935288599512

NXP Semiconductors
PCF2129A_2
Product data sheet
8.2.1 Register Control_1
8.2 Control registers
PCF2129A has 28 8-bit registers. The first 3 registers with the addresses 00h, 01h, and
02h are used as control registers.
Table 5.
[1]
[2]
Bit
7
6
5
4
3
2
1
0
Default value.
When writing to the register this bit has always to be set logic 0.
Symbol
EXT_TEST
T
STOP
TSF1
POR_OVRD
12_24
SI
MI
Control_1 - control and status register 1 (address 00h) bit description
All information provided in this document is subject to legal disclaimers.
Value
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 02 — 7 May 2010
[1]
[2]
[1]
[1]
[1]
[1]
[1]
[1]
Description
normal mode
external clock test mode
unused
RTC source clock runs
RTC clock is stopped;
no timestamp interrupt generated
flag set when TS input is driven to an
intermediate level between power supply and
ground;
Power-On Reset Override (PORO) facility
disabled;
PORO enabled
24 hour mode selected
12 hour mode selected
minute interrupt disabled
minute interrupt enabled
second interrupt disabled
second interrupt enabled
RTC divider chain flip-flops are
asynchronously set logic 0;
CLKOUT at 32.768 kHz, 16.384 kHz, or
8.192 kHz is still available
flag must be cleared to clear interrupt
set logic 0 for normal operation
Integrated RTC, TCXO and quartz crystal
PCF2129A
© NXP B.V. 2010. All rights reserved.
-
Reference
Section 8.13
Section 8.14
Section 8.11.1
Section 8.7.2
Table 18
Section 8.12.1
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