PCF2129AT/1,512 NXP Semiconductors, PCF2129AT/1,512 Datasheet - Page 34

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PCF2129AT/1,512

Manufacturer Part Number
PCF2129AT/1,512
Description
IC REAL TIME CLK/CALENDAR 20SOIC
Manufacturer
NXP Semiconductors
Type
Clock/Calendar/Alarmr
Datasheets

Specifications of PCF2129AT/1,512

Package / Case
20-SOIC (7.5mm Width)
Date Format
YY-MM-DD-dd
Time Format
HH:MM:SS (12/24 hr)
Interface
I²C, SPI
Voltage - Supply
1.8 V ~ 4.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Clock, Alarm, Watchdog, Timestamp
Supply Voltage (max)
4.2 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
I2C, SPI
Supply Current
800 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4960-5
935288599512
NXP Semiconductors
PCF2129A_2
Product data sheet
8.11.1 Timestamp flag
8.11 Timestamp function
The PCF2129A has an active LOW timestamp input pin TS, internally pulled with an
on-chip pull-up resistor to the internal power supply of the device. It also has a timestamp
detection circuit which can detect two different events:
The timestamp function is enabled by default after power-on and it can be switched off by
setting the control bit TSOFF (register Timestp_ctl).
A most common application of the timestamp function is described in
See
1. Input on pin TS is driven to an intermediate level between power supply and ground.
2. Input on pin TS is driven to ground.
1. When the TS input pin is driven to an intermediate level between the power supply
2. When the TS input pin is driven to ground the following sequence occurs:
Fig 18. Timestamp detection with two push-buttons on one the TS pin (e.g. for tamper
and ground then the following sequence occurs:
a. The actual date and time are stored in the timestamp registers.
b. The timestamp flag TSF1 (register Control_1) is set.
c. If the TSIE bit (register Control_2) is active, an interrupt on the INT pin is
The TSF1 flag can be cleared by using the interface. Clearing the flag will clear the
interrupt. Once TSF1 is cleared it will only be set again when a new negative edge on
pin TS is detected.
a. The actual date and time are stored in the timestamp registers.
b. In addition to the TSF1 flag, the TSF2 flag (register Control_2) is set.
c. If the TSIE bit is active, an interrupt on the INT pin is generated.
Section 8.12.5
generated.
detection)
All information provided in this document is subject to legal disclaimers.
push-button 2
connected to
cover 2
for a description of interrupt generation from the timestamp function.
Rev. 02 — 7 May 2010
V
SS
R2 =
200 kΩ
± 5 %
Integrated RTC, TCXO and quartz crystal
push-button 1
connected to
cover 1
TS
1
2
3
4
5
6
7
8
PCF212xA
V
DD
R1 =
200 kΩ
± 20 %
013aaa176
PCF2129A
16
15
14
13
12
11
10
9
Ref. 3
© NXP B.V. 2010. All rights reserved.
“AN10857”.
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