AD9271BSVZRL-25 Analog Devices Inc, AD9271BSVZRL-25 Datasheet - Page 11

IC ADC OCT 12BIT 25MSPS 100-TQFP

AD9271BSVZRL-25

Manufacturer Part Number
AD9271BSVZRL-25
Description
IC ADC OCT 12BIT 25MSPS 100-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9271BSVZRL-25

Number Of Bits
12
Sampling Rate (per Second)
25M
Data Interface
Serial, SPI™
Number Of Converters
8
Power Dissipation (max)
1.06W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad
Power Dissipation Pd
150mW
Peak Reflow Compatible (260 C)
Yes
Supply Voltage
1.8V
Sample Rate
25 MSPS
Termination Type
SMD
Supply Voltage Max
1.9V
Input Channels Per Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9271-50EBZ - BOARD EVALUATION AD9271 50MSPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9271BSVZRL-25
Manufacturer:
AD
Quantity:
1 140
Part Number:
AD9271BSVZRL-25
Manufacturer:
Analog Devices Inc
Quantity:
10 000
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
0
3, 4, 9, 10, 15,
16, 21, 22, 25,
50, 54, 55, 60,
61, 66, 67, 72,
73, 92
26, 47
84
1
2
5
6
7
8
11
12
13
14
17
LOSW-
LOSW-H
LOSW-F
Name
GND
AVDD
DRVDD
CWVDD
LI-E
LG-E
LO-F
LOSW-F
LI-F
LG-F
LO-G
LOSW-G
LI-G
LG-G
LO-H
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
CLK+
CLK–
LO-G
LG-G
LO-H
LG-H
LG-E
LO-F
LG-F
LI-G
LI-H
LI-E
LI-F
G
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
Description
Ground (exposed paddle should be tied to a quiet analog ground)
1.8 V Analog Supply
1.8 V Digital Output Driver Supply
3.3 V Analog Supply
LNA Analog Input for Channel E
LNA Ground for Channel E
LNA Analog Output for Channel F
LNA Analog Output Complement for Channel F
LNA Analog Input for Channel F
LNA Ground for Channel F
LNA Analog Output for Channel G
LNA Analog Output Complement for Channel G
LNA Analog Input for Channel G
LNA Ground for Channel G
LNA Analog Output for Channel H
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Figure 4. 100-Lead TQFP Pin Configuration
Rev. B | Page 11 of 60
(Not to Scale)
AD9271
TOP VIEW
75
74
73
72
71
70
69
68
67
66
65
63
62
61
60
59
58
57
56
55
54
53
52
51
64
LI-D
LG-D
AVDD
AVDD
LO-C
LOSW-C
LI-C
LG-C
AVDD
AVDD
LO-B
LOSW-B
LI-B
LG-B
AVDD
AVDD
LO-A
LOSW-A
LI-A
LG-A
AVDD
AVDD
CSB
SDIO
SCLK
AD9271

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