AD9271BSVZRL-25 Analog Devices Inc, AD9271BSVZRL-25 Datasheet - Page 42

• Manufacturer Part Number: AD9271BSVZRL-25
• Description: IC ADC OCT 12BIT 25MSPS 100-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9271BSVZRL-25

• Number Of Bits: 12
• Sampling Rate (per Second): 25M
• Data Interface: Serial, SPI™
• Number Of Converters: 8
• Power Dissipation (max): 1.06W
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad
• Power Dissipation Pd: 150mW
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage: 1.8V
• Sample Rate: 25 MSPS
• Termination Type: SMD
• Supply Voltage Max: 1.9V
• Input Channels Per Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9271-50EBZ - BOARD EVALUATION AD9271 50MSPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9271
EVALUATION BOARD
The AD9271 evaluation board provides all the support circuitry
required to operate the AD9271 in its various modes and con-
figurations. The LNA is driven differentially through a transformer.
Figure 73 shows the typical bench characterization setup used
to evaluate the ac performance of the AD9271. It is critical that
the signal sources used for the analog input and clock have very low
phase noise (<1 ps rms jitter) to realize the optimum performance
of the signal chain. Proper filtering of the analog input signal to
remove harmonics and lower the integrated or broadband noise at
the input is also necessary to achieve the specified noise performance.
See the Quick Start Procedure section to get started and Figure 75
to Figure 86 for the complete schematics and layout diagrams
that demonstrate the routing and grounding techniques that
should be applied at the system level.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output.
Connect the supply to the rated 100 V ac to 240 V ac wall outlet
at 47 Hz to 63 Hz. The other end is a 2.1 mm inner diameter
jack that connects to the PCB at P701. Once on the PC board,
the 6 V supply is fused and conditioned before connecting to
three low dropout linear regulators that supply the proper bias
to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
L702 to L704 can be removed to disconnect the switching
power supply. This enables the user to bias each section of the
board individually. Use P501 to connect a different supply for
each section. At least one 1.8 V supply is needed with a 1 A current
capability for AVDD_DUT and DRVDD_DUT; however, it is
recommended that separate supplies be used for both analog
and digital domains. To operate the evaluation board using the
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
ROHDE & SCHWARZ,
ROHDE & SCHWARZ,
2V p-p SIGNAL
SYNTHESIZER
SPECTRUM
ANALYZER
FS5A20
SMA,
ANALOG INPUT
SWITCHING
POWER
SUPPLY
CW OUTPUT
BAND-PASS
FILTER
2A MAX
6V DC
OSCILLATOR
VFAC3
Figure 73. Evaluation Board Connection
–
1.8V
CLK
AD9271
+
EVALUATION BOARD
Rev. B | Page 42 of 60
–
1.8V
+
CH A TO CH H
–
3.3V
SPI and alternate clock options, a separate 3.3 V analog supply
is needed in addition to the other supplies. The 3.3 V supply, or
AVDD_3.3 V, should have a 1 A current capability.
To bias the crosspoint switch circuitry or CW section, separate
+5 V and −5 V supplies are required at P511. These should each
have 1 A current capability. This section cannot be biased from
a 6 V, 2 A wall supply. Separate supplies are required at P511.
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as Rohde & Schwarz SMA
or HP8644B signal generators or the equivalent. Use a 1 m, shielded,
RG-58, 50 Ω coaxial cable for making connections to the evalu-
ation board. Enter the desired frequency and amplitude from the
specifications tables. The evaluation board is set up to be clocked
from the crystal oscillator, OSC401. If a different or external clock
source is desired, follow the instructions for CLOCK outlined in
the Default Operation and Jumper Selection Settings section.
Typically, most Analog Devices evaluation boards can accept
~2.8 V p-p or 13 dBm sine wave input for the clock. When
connecting the analog input source, it is recommended to use a
multipole, narrow-band, band-pass filter with 50 Ω terminations.
Analog Devices uses TTE and K&L Microwave, Inc., band-pass
filters. The filter should be connected directly to the evaluation board.
OUTPUT SIGNALS
The default setup uses the FIFO5 high speed, dual-channel
FIFO data capture board (HSC-ADC-EVALCZ). Two of the
eight channels can then be evaluated at the same time. For more
information on channel settings on these boards and their optional
settings, visit www.analog.com/FIFO.
+
SERIAL
12-BIT
LVDS
SPI
FPGA
SPI
–
HSC-ADC-EVALCZ
PS
FIFO DATA
CONNECTOR
CAPTURE
(DATA/SPI)
BOARD
+
USB
SOFTWARE
ANALYZER
RUNNING
ANALOG
VISUAL
USER
ADC
PC
OR