MT47H32M16BN-37E:D Micron Technology Inc, MT47H32M16BN-37E:D Datasheet - Page 132
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MT47H32M16BN-37E:D
Manufacturer Part Number
MT47H32M16BN-37E:D
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16BN-37ED.pdf
(139 pages)
Specifications of MT47H32M16BN-37E:D
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
500ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
205mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H32M16BN-37E:D
Manufacturer:
MICRON
Quantity:
489
Company:
Part Number:
MT47H32M16BN-37E:D
Manufacturer:
MICRON
Quantity:
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Company:
Part Number:
MT47H32M16BN-37E:D TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 82: RESET Function
PDF: 09005aef82f1e6e2
Rev. M 9/08 EN
Bank address
Command
Address
ODT
DQS 3
DM 3
CK#
CKE
A10
DQ 3
R
CK
tt
Bank a
READ
Col n
T0
High-Z
High-Z
Notes:
NOP 2
T1
1. Vdd, VddL, VddQ, Vtt, and Vref must be valid at all times.
2. Either NOP or DESELECT command may be applied.
3. DM represents DM for x4/x8 configuration and UDM, LDM for x16 configuration. DQS
4. In certain cases where a READ cycle is interrupted, CKE going HIGH may result in the
5. Initialization timing is shown in Figure 45 (page 93).
represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, and RDQS# for the appropri-
ate configuration (x4, x8, x16).
completion of the burst.
Bank b
Col n
READ
T2
NOP 2
Indicates a break in
time scale
T3
DO
DO
NOP 2
T4
132
System
DO
RESET
t DELAY
Unknown
T5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
1
R
tt
On
High-Z
High-Z
Transitioning Data
t CL
© 2004 Micron Technology, Inc. All rights reserved.
t CK
Start of normal 5
initialization
t CL
sequence
NOP 2
Ta0
4
T = 400ns (MIN)
t CKE (MIN)
All banks
Tb0
PRE
Don’t Care
High-Z
t RPA
Reset