MT47H32M16BN-37E:D Micron Technology Inc, MT47H32M16BN-37E:D Datasheet - Page 32
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MT47H32M16BN-37E:D
Manufacturer Part Number
MT47H32M16BN-37E:D
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16BN-37ED.pdf
(139 pages)
Specifications of MT47H32M16BN-37E:D
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
500ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
205mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H32M16BN-37E:D
Manufacturer:
MICRON
Quantity:
489
Company:
Part Number:
MT47H32M16BN-37E:D
Manufacturer:
MICRON
Quantity:
319
Company:
Part Number:
MT47H32M16BN-37E:D TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Table 10: DDR2 Idd Specifications and Conditions
Notes: 1–7 apply to the entire table
PDF: 09005aef82f1e6e2
Rev. M 9/08 EN
Parameter/Condition
Operating one bank active-precharge
current:
t
HIGH between valid commands; address bus
inputs are switching; Data bus inputs are
switching
Operating one bank active-read-pre-
charge current: Iout = 0mA; BL = 4, CL = CL
(Idd), AL = 0;
t
CKE is HIGH, CS# is HIGH between valid com-
mands; address bus inputs are switching; Da-
ta pattern is same as Idd4W
Precharge power-down current: All
banks idle;
er control and address bus inputs are stable;
Data bus inputs are floating
Precharge quiet standby current:All
banks idle;
is HIGH; Other control and address bus in-
puts are stable; Data bus inputs are floating
Precharge standby current: All banks idle;
t
er control and address bus inputs are switch-
ing; Data bus inputs are switching
Active power-down current: All banks
open;
trol and address bus inputs are stable; Data
bus inputs are floating
Active standby current:All banks open;
t
t
valid commands; Other control and address
bus inputs are switching; Data bus inputs are
switching
RAS =
RAS =
CK =
CK =
RP (Idd); CKE is HIGH, CS# is HIGH between
t
t
CK (Idd); CKE is HIGH, CS# is HIGH; Oth-
t
CK (Idd),
CK =
t
t
RAS MIN (Idd); CKE is HIGH, CS# is
RAS MIN (Idd),
t
CK =
t
t
CK =
CK =
t
CK (Idd); CKE is LOW; Other con-
t
CK =
t
t
CK (Idd),
RAS =
t
t
CK (Idd); CKE is LOW; Oth-
CK (Idd); CKE is HIGH, CS#
t
CK (Idd),
t
t
RAS MAX (Idd),
RCD =
t
RC =
t
RC =
t
t
RCD (Idd);
RC (Idd),
t
RC (Idd),
t
RP =
Symbol
Idd3Pf
Idd3Ps
Idd2Q
Idd2N
Idd3N
Idd2P
Idd0
Idd1
Configuration
Slow PDN exit
Fast PDN exit
32
x4, x8, x16
MR12 = 0
MR12 = 1
Electrical Specifications – Idd Parameters
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x16
x16
x16
x16
x16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
-25E/
100
135
115
165
-25
50
65
55
70
40
12
70
75
7
-3E/-3
120
105
150
90
45
55
50
60
35
12
65
70
7
© 2004 Micron Technology, Inc. All rights reserved.
-37E
110
135
80
95
40
45
45
50
30
12
55
60
7
110
130
-5E
80
90
35
40
40
45
25
12
45
50
7
Units
mA
mA
mA
mA
mA
mA
mA