PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 29

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PEF20550HV21XT

Manufacturer Part Number
PEF20550HV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF20550HV21XT

Lead Free Status / Rohs Status
Supplier Unconfirmed
PEB 2081 (SBCX)) the control channel is translated into the A/B-bit (bit5, 4th byte,
IOM-channel 2, downstream). The A/B-bit is monitored by the SBCX. A/B = 1 indicates
that the corresponding D-channel is available (A/B = 0 blocked). Depending on this
information, the SBCX controls the E-bit on the S
interface. When A/B = 0 the E-bit is forced in the inverted D-bit state, the S/G-bit is set
to high. As a result all active transmitters in the terminal and on the S
abandon their messages.
Figure 9
Control Channel Implementation with OCTAT
Transceiver and S
In figure 9 a Control Channel Implementation with OCTAT-P as line card transceiver
can be seen.
When an additional transceiver device is integrated in the terminal (e.g. an S
Semiconductor Group
E
SBCX
A/B = 0
A/B = 1
S/G
(optional)
0
A/B
ICC
-Adapter.
Blocked
Available
HDLC Controller
DSAC-P
Trans-
ceiver
U
p0
T = 0
T = 1
29
Blocked
Available
T
®
-P (PEB 2096) as Line Card
0
-bus and the S/G-bit on the IOM-2
OCTAT -P
R
C/I = 1100
C/I = 1000
C/I
0
-bus are forced to
Blocked
Available
ELIC
PEB 20550
PEF 20550
R
Overview
0
-adapter,
ITS05810
01.96

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