ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 140

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ST7265XEVALMS

Manufacturer Part Number
ST7265XEVALMS
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7265XEVALMS

Lead Free Status / Rohs Status
Supplier Unconfirmed
ST7265x
13.9 CONTROL PIN CHARACTERISTICS
13.9.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
3. The I
O ports and control pins) must not exceed I
4. The R
not tested in production.
5. To guarantee the reset of the device, a minimum pulse has to be applied to RESET pin. All short pulses applied on
RESET pin with a duration below t
140/163
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
R
V
V
V
V
hys
ON
OL
IH
IL
IO
ON
current sunk must always respect the absolute maximum rating specified in
pull-up equivalent resistor is based on a resistive transistor. This data is based on characterization results,
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Parameter
h(RSTL)in
1)
1)
3)
5)
VSS
can be ignored.
4)
2)
.
DD
V
V
V
V
External pin or
internal reset sources
, f
DD
DD
DD
IN
OSC
=
=5V
=5V
=5V
V
Conditions
SS
, and T
I
I
V
V
IO
IO
DD
DD
=+5mA
=+2mA
=5V
=3.3V
A
unless otherwise specified.
0.7xV
Min
V
130
70
20
SS
DD
Section 13.2
0.68
0.28
Typ
400
100
200
4
and the sum of I
0.3xV
Max
0.95
0.45
V
130
260
100
DD
DD
1/f
Unit
SFOSC
mV
kΩ
µs
ns
V
V
IO
(I/