ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 48

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ST7265XEVALMS

Manufacturer Part Number
ST7265XEVALMS
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7265XEVALMS

Lead Free Status / Rohs Status
Supplier Unconfirmed
ST7265x
I/O PORTS (Cont’d)
Figure 31. I/O Port General Block Diagram
Table 12. I/O Port Mode Options
Legend: NI - not implemented
Note: The diode to V
the pad and V
48/163
1
Input
Output
REGISTER
ACCESS
SOURCE (ei
EXTERNAL
INTERRUPT
DDR SEL
Off - implemented not activated
On - implemented and activated
OR SEL
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
x
DR
OR
SS
)
is implemented to protect the device against positive stress.
POLARITY
SELECTION
DD
ALTERNATE
OUTPUT
ALTERNATE
ENABLE
If implemented
/V
DDF
is not implemented in the true open drain pads. A local protection between
FROM
OTHER
BITS
1
0
Pull-Up
Off
On
Off
NI
N-BUFFER
PULL-UP
CONFIGURATION
P-Buffer
Off
On
Off
NI
SCHMITT
TRIGGER
CMOS
V
DD
/V
DDF
NI (see note)
to V
On
V
P-BUFFER
(see table below)
DD
DD
/V
DIODES
(see table below)
Diodes
PULL-UP
(see table below)
DDF
ALTERNATE
ANALOG
INPUT
INPUT
to V
PAD
On
SS