ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 62

• Manufacturer Part Number: ST7265XEVALMS
• Manufacturer: STMicroelectronics

Specifications of ST7265XEVALMS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ST7265x
11.3 USB INTERFACE (USB)
11.3.1 Introduction
The USB Interface implements a full-speed func-
tion interface between the USB and the ST7 mi-
crocontroller. It is a highly integrated circuit which
includes the transceiver, 3.3 voltage regulator, SIE
and USB Data Buffer interface. No external com-
ponents are needed apart from the external pull-
up on USBDP for full speed recognition by the
USB host.
11.3.2 Main Features
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11.3.3 Functional Description
The block diagram in
of the USB interface hardware.
Figure 36. USB Block Diagram
62/163
1
USBGND
USBVCC
USBDM
USB Specification Version 2.0 Compliant
Supports Full-Speed USB Protocol
Five Endpoints (including default endpoint)
CRC generation/checking, NRZI encoding/
decoding and bit-stuffing
USB Suspend/Resume operations
Special Data transfer mode with USB Data
Buffer Memory (2 x 512 bytes for upload or
download) to DTC
On-Chip 3.3V Regulator
On-Chip USB Transceiver
USBDP
Figure
Transceiver
Voltage
Regulator
3.3V
36, gives an overview
SIE
48 MHz
For general information on the USB, refer to the
“Universal Serial Bus Specifications” document
available at http//:www.usb.org.
Serial Interface Engine
The SIE (Serial Interface Engine) interfaces with
the USB, via the transceiver.
The SIE processes tokens, handles data transmis-
sion/reception, and handshaking as required by
the USB standard. It also performs frame format-
ting, including CRC generation and checking.
Endpoints
The Endpoint registers indicate if the microcontrol-
ler is ready to transmit/receive, and how many
bytes need to be transmitted.
Data Transfer to/from USB Data Buffer Memory
When a token for a valid Endpoint is recognized by
the USB interface, the related data transfer takes
place to/from the USB data buffer. In normal con-
figuration (MOD[1:0] bits=00 in the CTLR register),
at the end of the transaction, an interrupt is gener-
ated.
Interrupts
By reading the Interrupt Status register, applica-
tion software can know which USB event has oc-
curred.
INTERFACE
REGISTERS
REGISTERS
ENDPOINT
BUFFER
USB
Address,
data busses
and interrupts
BUFFER
DATA
USB
CPU