ST7265XEVALMS STMicroelectronics, ST7265XEVALMS Datasheet - Page 67

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ST7265XEVALMS

Manufacturer Part Number
ST7265XEVALMS
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7265XEVALMS

Lead Free Status / Rohs Status
Supplier Unconfirmed
USB INTERFACE (Cont’d)
11.3.5 Low Power modes
11.3.6 Interrupts
Note: The USB end of suspend interrupt event is connected to a single interrupt vector (USB ESUSP) with
the exit from halt capability (wake-up). All the other interrupt events are connected to another interrupt
vector: USB interrupt (USB). They generate an interrupt if the corresponding enable control bit is set and
the interrupt mask bits (I0, I1) in CC register are reset (RIM instruction).
Mode
HALT
WAIT
No effect on USB.
USB interrupt events cause the device to exit from WAIT mode.
USB registers are frozen.
In halt mode, the USB is inactive. USB operations resume when the MCU is woken up by an interrupt with
“exit from halt capability” or by an event on the USB line in case of suspend. This event will generate an
ESUSP interrupt which will wake-up from halt mode.
Suspend Mode Request
End of SUSPend mode.
Correct TRansfer
Interrupt Event
Setup OVeRrun
Start Of Frame
USB RESET
ERROR
Description
Event Flag
ESUSP
RESET
SOVR
SUSP
CTR
ERR
SOF
Enable Con-
ESUSPM
RESETM
SOVRM
SUSPM
trol Bit
CTRM
ERRM
SOFM
Exit From
Wait
Yes
Yes
Yes
Yes
Yes
Yes
Yes
ST7265x
From
Exit
Halt
Yes
No
No
No
No
No
No
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