EPM7256EGI192-20 Altera, EPM7256EGI192-20 Datasheet - Page 5
![IC MAX 7000 CPLD 256 192-PGA](/photos/6/71/67118/544-192-pga_sml.jpg)
EPM7256EGI192-20
Manufacturer Part Number
EPM7256EGI192-20
Description
IC MAX 7000 CPLD 256 192-PGA
Manufacturer
Altera
Series
MAX® 7000r
Datasheet
1.EPM7064STC44-10.pdf
(66 pages)
Specifications of EPM7256EGI192-20
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
20.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
256
Number Of Gates
5000
Number Of I /o
164
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
192-PGA
Voltage
5V
Memory Type
EEPROM
Number Of Logic Elements/cells
16
Family Name
MAX 7000
# Macrocells
256
Number Of Usable Gates
5000
Frequency (max)
83.33MHz
Propagation Delay Time
20ns
Number Of Logic Blocks/elements
16
# I/os (max)
164
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
192
Package Type
CPGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2356
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256EGI192-20
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Notes:
(1)
(2)
Altera Corporation
EPM7032
EPM7032S
EPM7064
EPM7064S
EPM7096
EPM7128E
EPM7128S
EPM7160E
EPM7160S
EPM7192E
EPM7192S
EPM7256E
EPM7256S
Table 5. MAX 7000 Maximum User I/O Pins
Device
When the JTAG interface in MAX 7000S devices is used for either boundary-scan testing or for ISP, four I/O pins
become JTAG pins.
Perform a complete thermal analysis before committing a design to this device package. For more information, see
the
Operating Requirements for Altera Devices Data
PLCC
44-
Pin
36
36
36
36
PQFP
44-
Pin
36
The MAX 7000 architecture supports 100% TTL emulation and
high-density integration of SSI, MSI, and LSI logic functions. The
MAX 7000 architecture easily integrates multiple devices ranging from
PALs, GALs, and 22V10s to MACH and pLSI devices. MAX 7000 devices
are available in a wide range of packages, including PLCC, PGA, PQFP,
RQFP, and TQFP packages. See
MAX 7000 devices use CMOS EEPROM cells to implement logic
functions. The user-configurable MAX 7000 architecture accommodates a
variety of independent combinatorial and sequential logic functions. The
devices can be reprogrammed for quick and efficient iterations during
design development and debug cycles, and can be programmed and
erased up to 100 times.
TQFP
44-
Pin
36
36
36
36
PLCC
68-
Pin
52
52
PLCC
84-
Pin
68
68
64
68
68
64
64
MAX 7000 Programmable Logic Device Family Data Sheet
Note (1)
Sheet.
PQFP
100-
Pin
68
76
84
84
84
68
84
84
TQFP
100-
Pin
(2)
(2)
Table
100
100
104
104
124
124
132
PQFP
160-
Pin
5.
(2)
160-
PGA
124
Pin
192-
PGA
164
Pin
164
PQFP
208-
Pin
(2)
RQFP
208-
164
164
Pin
5