DSPB56364AF100 Freescale Semiconductor, DSPB56364AF100 Datasheet - Page 14

IC DSP 24BIT AUD 100MHZ 100-LQFP

DSPB56364AF100

Manufacturer Part Number
DSPB56364AF100
Description
IC DSP 24BIT AUD 100MHZ 100-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56364AF100

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
100MHz
Non-volatile Memory
ROM (24 kB)
On-chip Ram
11.25kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPB56364AF100
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
DSPB56364AF100
Manufacturer:
TI
Quantity:
996
Part Number:
DSPB56364AF100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSPB56364AF100
Manufacturer:
FREESCALE
Quantity:
20 000
Enhanced Serial Audio Interface
2-10
Signal
Name
SCKR
SDO5
SDO4
SCKT
SDI0
PC4
PC0
PC3
PC6
Input, output, or
Input, output, or
Input, output, or
Input, output, or
Input or output
Input or output
disconnected
disconnected
disconnected
disconnected
Signal Type
Output
Output
Input
Table 2-10 Enhanced Serial Audio Interface Signals (continued)
State During
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
Reset
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
DSP56364 Technical Data, Rev. 4.1
Port C 4—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Receiver Serial Clock—SCKR provides the receiver serial bit clock for the
ESAI. The SCKR operates as a clock input or output used by all the enabled
receivers in the asynchronous mode (SYN=0), or as serial flag 0 pin in the
synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is determined by the
RCKD bit in the RCCR register. When configured as the output flag OF0, this
pin will reflect the value of the OF0 bit in the SAICR register, and the data in the
OF0 bit will show up at the pin synchronized to the frame sync in normal mode
or the slot in network mode. When configured as the input flag IF0, the data
value at the pin will be stored in the IF0 bit in the SAISR register, synchronized
by the frame sync in normal mode or the slot in network mode.
Port C 0—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Transmitter Serial Clock—This signal provides the serial bit rate clock for the
ESAI. SCKT is a clock input or output used by all enabled transmitters and
receivers in synchronous mode, or by all enabled transmitters in asynchronous
mode.
Port C 3—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Serial Data Output 5—When programmed as a transmitter, SDO5 is used to
transmit data from the TX5 serial transmit shift register.
Serial Data Input 0—When programmed as a receiver, SDI0 is used to receive
serial data into the RX0 serial receive shift register.
Port C 6—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Serial Data Output 4—When programmed as a transmitter, SDO4 is used to
transmit data from the TX4 serial transmit shift register.
Signal Description
Freescale Semiconductor

Related parts for DSPB56364AF100