DSPB56364AF100 Freescale Semiconductor, DSPB56364AF100 Datasheet - Page 22

• Manufacturer Part Number: DSPB56364AF100
• Description: IC DSP 24BIT AUD 100MHZ 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56364AF100

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (24 kB)
• On-chip Ram: 11.25kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Phase Lock Loop (PLL) Characteristics
3.8
3-6
1
2
1
Measured at 50% of the input transition.
The maximum value for PLL enabled is given for minimum V
No.
V
PLL external capacitor (PCAP pin to V
• @ MF ≤ 4
• @ MF > 4
1
2
3
4
CO
C
C
(MF x 680)-120, for MF ≤ 4, or
MF x 1100, for MF > 4.
PCAP
PCAP
frequency when PLL enabled (MF × E
Frequency of EXTAL (EXTAL Pin Frequency)
The rise and fall time of this external clock should be 3 ns maximum.
EXTAL input high
EXTAL input low
EXTAL cycle time
• With PLL disabled (46.7%–53.3% duty cycle
• With PLL enabled (42.5%–57.5% duty cycle
• With PLL disabled (46.7%–53.3% duty cycle
• With PLL enabled (42.5%–57.5% duty cycle
• With PLL disabled
• With PLL enabled
Phase Lock Loop (PLL) Characteristics
is the value of the PLL capacitor (connected between the P
can be computed from one of the following equations:
Characteristics
1, 2
1, 2
2
Characteristics
CCP
DSP56364 Technical Data, Rev. 4.1
) (C
Table 3-6 PLL Characteristics
f
× 2/PDF)
Table 3-5 Clock Operation
PCAP
1
)
6
6
6
6
)
)
)
)
CO
and maximum MF.
(MF × 580) − 100
CAP
MF × 830
Min
30
pin and V
Symbol
CCP
ET
ET
ET
Ef
). The recommended value in pF for
H
C
L
(MF × 780) − 140
MF × 1470
Max
200
10.00 ns
10.00 ns
4.67 ns
4.25 ns
4.67 ns
4.25 ns
Min
Freescale Semiconductor
0
157.0 μs
157.0 μs
273.1 μs
MHz
Unit
100.0
pF
Max
∞
∞
∞