CY7C64013C-SXC Cypress Semiconductor Corp, CY7C64013C-SXC Datasheet - Page 26

• Manufacturer Part Number: CY7C64013C-SXC
• Description: IC MCU 8K FULL SPEED USB 28SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013C-SXC

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: (8051) USB
• No. Of I/o's: 19
• Ram Memory Size: 256Byte
• Cpu Speed: 48MHz
• Digital Ic Case Style: SOIC
• Supply Voltage Range: 4V To 5.5V
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: HAPI, I2C, USB
• Rohs Compliant: Yes
• Processor Series: CY7C64xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: HAPI, I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Package: 28SOIC
• Device Core: M8C
• Family Name: enCoRe II
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details
• Other names: 428-1847

Interrupts
Interrupts are generated by the GPIO/DAC pins, the internal
timers, I
USB traffic conditions. All interrupts are maskable by the Global
Interrupt Enable Register and the USB End Point Interrupt
Enable Register. Writing a ‘1’ to a bit position enables the
interrupt associated with that bit position.
Table 28. Global Interrupt Enable Register
Bit 0 : USB Bus RST Interrupt Enable
Bit 1 :128-µs Interrupt Enable
Bit 2 : 1.024-ms Interrupt Enable
Bit 3 : Reserved
Document Number: 38-08001 Rev. *D
Global
Interrupt
Enable
Register
Bit #
Bit Name
Read/Write
Reset
1= Enable Interrupt on a USB Bus Reset; 0 = Disable
interrupt on a USB Bus Reset (Refer to
Interrupt on page
1 = Enable Timer interrupt every 128 µs; 0 = Disable Timer
Interrupt for every 128 µs.
1= Enable Timer interrupt every 1.024 ms; 0 = Disable
Timer Interrupt every 1.024 ms.
2
C-compatible interface or HAPI operation, or on various
Reserved
7
-
-
29)
I
2
C Interrupt
Enable
R/W
6
0
GPIO Interrupt
Enable
USB Bus Reset
R/W
5
0
DAC Interrupt
enable
X
4
-
Bit 4 : DAC Interrupt Enable
Bit 5 : GPIO Interrupt Enable
Bit 6 : I
Bit 7 : Reserved
1 = Enable Interrupt on falling/rising edge on any GPIO;
0 = Disable Interrupt on falling/rising edge on any GPIO
(Refer to
Interrupt Enable Ports on page
1= Enable Interrupt on I2C related activity; 0 = Disable I2C
related activity interrupt.
(Refer to
Reserved
1 = Enable DAC Interrupt; 0 = Disable DAC interrupt
2
R/W
C Interrupt Enable
3
0
I
GPIO Configuration Port on page 16
2
C Interrupt on page
Interrupt Enable
1.024-ms
R/W
2
0
128-s Interrupt
Enable
R/W
30).
17.)
1
0
CY7C64013C
CY7C64113C
ADDRESS 0X20
Interrupt Enable
USB Bus RST
Page 26 of 53
R/W
0
0
and
GPIO
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