CY7C64013C-SXC Cypress Semiconductor Corp, CY7C64013C-SXC Datasheet - Page 31

• Manufacturer Part Number: CY7C64013C-SXC
• Description: IC MCU 8K FULL SPEED USB 28SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013C-SXC

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: (8051) USB
• No. Of I/o's: 19
• Ram Memory Size: 256Byte
• Cpu Speed: 48MHz
• Digital Ic Case Style: SOIC
• Supply Voltage Range: 4V To 5.5V
• Core Size: 8 Bit
• Program Memory Size: 8KB
• Embedded Interface Type: HAPI, I2C, USB
• Rohs Compliant: Yes
• Processor Series: CY7C64xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: HAPI, I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Package: 28SOIC
• Device Core: M8C
• Family Name: enCoRe II
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details
• Other names: 428-1847

the corresponding pins as possible, to meet the USB driver
requirements of the USB specifications.
USB Serial Interface Engine (SIE)
The SIE allows the CY7C64x13C microcontroller to commu-
nicate with the USB host. The SIE simplifies the interface
between the microcontroller and USB by incorporating hardware
that handles the following USB bus activity independently of the
microcontroller:
■
■
■
■
■
Firmware is required to handle the following USB interface tasks:
■
■
■
■
USB Enumeration
The USB device is enumerated under firmware control. The
following is a brief summary of the typical enumeration process
of the CY7C64x13C by the USB host. For a detailed description
of the enumeration process, refer to the USB specification.
Table 31. USB Status and Control Register
Bits[2..0] : Control Action
Document Number: 38-08001 Rev. *D
USB Status
and Control
Bit #
Bit Name
Read/Write
Reset
Bit stuffing/unstuffing
Checksum generation/checking
ACK/NAK/STALL
Token type identification
Address checking
Coordinate enumeration by responding to SETUP packets
Fill and empty the FIFOs
Suspend/Resume coordination
Verify and select DATA toggle values
Set to control action as per
allow the upstream port to be driven manually by firmware.
For normal USB operation, all of these bits must be
Endpoint Size
R/W
7
0
Endpoint Mode
Table
R/W
6
0
32.The three control bits
D+ Upstream
R
5
0
D– Upstream
R
4
0
In this description, ‘Firmware’ refers to embedded firmware in the
CY7C64x13C controller.
USB Upstream Port Status and Control
USB status and control is regulated by the USB Status and
Control Register, as shown in
cleared during reset.
Table 32. Control Bit Definition for Upstream Port
1. The host computer sends a SETUP packet followed by a
2. Firmware decodes the request and retrieves its Device
3. The host computer performs a control read sequence and
4. After receiving the descriptor, the host sends a SETUP packet
5. Firmware stores the new address in its USB Device Address
6. The host sends a request for the Device descriptor using the
7. Firmware decodes the request and retrieves the Device
8. The host performs a control read sequence and Firmware
9. The host generates control reads from the device to request
10.Once the device receives a Set Configuration request, its
Control Bits
DATA packet to USB address 0 requesting the Device
descriptor.
descriptor from the program memory tables.
Firmware responds by sending the Device descriptor over the
USB bus, via the on-chip FIFOs.
followed by a DATA packet to address 0 assigning a new USB
address to the device.
Register after the no-data control sequence completes.
new USB address.
descriptor from program memory tables.
responds by sending its Device descriptor over the USB bus.
the Configuration and Report descriptors.
functions may now be used.
Bus Activity
000
001
010
011
100
101
110
cleared.
stream port.
111
R/W
3
0
Table 32
Not Forcing (SIE Controls Driver)
Force D+[0] HIGH, D–[0] LOW
Force D+[0] LOW, D–[0] HIGH
Force SE0; D+[0] LOW, D–[0] LOW
Force D+[0] LOW, D–[0] LOW
Force D+[0] HiZ, D–[0] LOW
Force D+[0] LOW, D–[0] HiZ
Force D+[0] HiZ, D–[0] HiZ
Control Action
Bit 2
R/W
2
0
shows how the control bits affect the up-
Control Action
Table
Control Action
31. All bits in the register are
Bit 1
R/W
1
0
CY7C64013C
CY7C64113C
ADDRESS 0x1F
Control Action
Page 31 of 53
Bit 0
R/W
0
0
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