MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 111

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MC68030RC20C

Manufacturer Part Number
MC68030RC20C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030RC20C

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030RC20C-1F91C
Manufacturer:
ON/安森美
Quantity:
20 000
3
3-26
location HEAD if the address in HEAD remains unaltered. If HEAD contains
to the second MOVE instruction to try again.
t w o comparisons and updates two variables when the results of the com-
The CAS and CAS2 instructions together allow safe operations in the ma-
empty, HEAD contains the NULL pointer (0); otherwise, HEAD contains the
The CAS2 instruction is similar to the CAS instruction except that it performs
new values into the destination addresses. If the result of either comparison
is not equal, the instruction copies the values in the destination addresses
into the compare operands.
nipulation of system linked lists. Controlling a single location, HEAD in the
example, manages a last-in-first-out linked list (see Figure 3-2). If the list is
address of the element most recently added to the list. The code fragment
shown in Figure 3-2 illustrates the code for inserting an element. The MOVE
instructions load the address in location HEAD into DO and into the NEXT
pointer in the element being inserted, and the address of the new element
into DI. The CAS instruction stores the address of the inserted element into
a new address, the instruction loads the new address into DO and branches
parisons are equal. If the results of both comparisons are equal, CAS2 copies
SINSERT
SI L OOP
BEFORE INSERTING AN ELEMENT:
AFTER INSERTING AN ELEMENT:
NEW ~ / ~
H E A D ~
C A S . L D O , D I . H E A D
MOVE.L HEAD,DO
MOVE.L DO,(NEXT.A1)
MOVE.L A1.D1
B N E
ENTRY
ENTRY
S I L O O P
Figure 3-2. Linked List Insertion
MC68030 USER'S MANUAL
I
I
H E A D ~ / ~
/ ~
ALLOCATE NEW ENTRY, ADDRESS IN AI
IF WE STILL POINT TO TOP OF STACK, UPDATE THE HEAD POINTER
MOVE HEAD POINTER VALUE TO DO
ESTABLISH FORWARD LINK IN NEW ENTRY
MOVE NEW ENTRY POINTER VALUE TO D1
IF NOT. TRY AGAIN
ENTRY
I
///~1
ENTRY
E N T R Y
MOTOROLA
I
J

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