MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 91

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

3
3-6
3:2.3 Logical Instructions
The logical operation instructions (AND, OR, EOR, and NOT) perform logical
operations with all sizes of integer data operands. A similar set of immediate
instructions (ANDI, ORI, and EORI) provide these logical operations with all
sizes of immediate data. The TST instruction compares the operand with zero
arithmetically, placing the result in the condition code register. Table 3-3
summarizes the logical operations.
ADD
ADDA
ADDI
ADDQ
ADDX
CLR
CMP
CMPA
CMPI
CMPM
CMP2
DlVS/DIVU
DlVSL/DIVUL
EXT
EXTB
NEG
SUB
SUBA
SUBI
SUBX
MULS/MULU
NEGX
SUBQ
Instruction
Operand Syntax
(An)+,(An)+
- (An),- (An)
- ( A n ) , - ( A n )
#(data),(ea)
#(data),(ea}
#(data),{ea)
#(data),(ea)
#(data),(ea)
(ea),Dr:Dq
(ea),Dr:Dq
(ea),Dh:DI
Table 3-2. Integer Arithmetic Operations
(ea),An
(ea),Dn
(ea),Dn
{ea},Dn
(,ea),Dn
(ea),An
{ea),Dn
(ea),Rn
(ea),Dq
Dn,(ea)
(ea),An
Dn,(ea)
(ea),DI
Dn,Dn
Dn,Dn
(ea}
(ea)
(ea}
Dn
Dn
Dn
MC68030 USER'S MANUAL
Operand Size
64/32 J 32:32
32/32 ~ 32:32
32/16 I) 16:16
32/32 i 32
32 x 32 t 32
32 x 32 I) 64
16 x 16 J 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16 J 32
8 e, 16
8 i' 32
16, 32
16, 32
16, 32
'destination - source - X 0 destination
source+destination I) destination
source+destination+X 0 destination
0 ~ destination
destination - source
destination - immediate data
destination - source
destination/source i destination (signed or unsigned)
sign extended destination IF destination
source x destination ~ destination (signed or unsigned)
0 - destination J destination
0 - destination - X i destination
destination = source I) destination
destination - immediate data ~ destination
immediate data +destination i destination
lower bound ( - Rn ( - upper bound
Operation
MOTOROLA