MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 242

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
LEGEND:
EXAMPLE
X
- -
A
S
N
N A - -
Case
No.
4
5
6
2
3
1
A system uses a watchdog timer to terminate accesses to an unpopulated
address space. The timer asserts BERR after timeout (case 3).
- -
- -
- -
- -
- -
The number of current even bus state (e.g., $2, $4, etc.)
Signal was asserted in previous state and remains asserted in this state
State N + 2 not part of bus cycle
Signal is asserted in this bus state
Signal is not asserted in this state
D o n ' t
STERM
HALT
STERM
HALT
STERM
HALT
STERM
BERR
HALT
STERM
BERR
HALT
STERM
BERR
BERR
BERR
BERR
HALT
Signal
Control
A:
Table 7-9. STERM, BERR, and HALT Assertion Results
care
Asserted on Rising
A/S
A/S
A/S
NA
NA
NA
NA
NA
NA
NA
NA
A
A
A
A
A
A
A
Edge of State
N
MC68030 USER'S M A N U A L
N + 2
- -
- -
- -
- -
- -
- -
- -
- -
- -
A
NA
A
NA
A
S
S
S
S
Terminate and take bus error exception, possibly
Terminate and take bus error exception, possibly
Terminate and retry w h e n HALT negated.
Terminate and retry w h e n HALT negated.
\ o r m a l cycle terminate and continue.
No:mal cycle terminate and halt. Continue w h e n HALT
deferred.
deferred.
negated.
Result
7-81
7