LAN9420I-NU SMSC, LAN9420I-NU Datasheet - Page 124

IC ETHERNET CTRLR SGL 128VTQFP

LAN9420I-NU

Manufacturer Part Number
LAN9420I-NU
Description
IC ETHERNET CTRLR SGL 128VTQFP
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheets

Specifications of LAN9420I-NU

Controller Type
Ethernet Controller
Interface
PCI
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
145mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.6 V
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
10/100 Base-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1085

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9420I-NU
Manufacturer:
Standard
Quantity:
368
Part Number:
LAN9420I-NU
Manufacturer:
SMSC
Quantity:
7 468
Part Number:
LAN9420I-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
Revision 1.4 (12-17-08)
4.4.3
BITS
31:0
Physical Address [31:0]
This field contains the lower 32 bits (32:0) of the Physical Address of this
MAC device.
MAC Address Low Register (ADDRL)
This register contains the lower 32 bits of the physical address of the MAC, where ADDRL[7:0] is the
first octet of the Ethernet frame.
Table 4.6
reception of the Ethernet physical address.
ADDRL, ADDRH
As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and
ADDRH registers would be programmed as shown in
load this configuration from the EEPROM are shown in
page
ADDRL[23:16]
ADDRL[31:24]
ADDRH[15:8]
ADDRL[15:8]
ADDRH[7:0]
ADDRL[7:0]
31.
Offset:
below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the
Figure 4.2 Example ADDRL, ADDRH Address Ordering
Table 4.6 ADDRL, ADDRH Byte Ordering
31
31
0x78
DESCRIPTION
0088h
xx
24
24
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
23
DATASHEET
23
0x56
xx
ADDRH
ADDRL
16
16
124
15
15
ORDER OF RECEPTION ON ETHERNET
0xBC
0x34
Size:
8
8
Figure
7
7
0x9A
0x12
Section 3.3.5.1, "EEPROM Format," on
4.2. The values required to automatically
0
0
32 bits
2
3
4
5
6
1
nd
rd
st
th
th
th
TYPE
SMSC LAN9420/LAN9420i
R/W
DEFAULT
32‘hF
Datasheet

Related parts for LAN9420I-NU