LAN9420I-NU SMSC, LAN9420I-NU Datasheet - Page 44

• Manufacturer Part Number: LAN9420I-NU
• Description: IC ETHERNET CTRLR SGL 128VTQFP
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9420I-NU

• Controller Type: Ethernet Controller
• Interface: PCI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 145mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.6 V
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 10/100 Base-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1085

Revision 1.4 (12-17-08)
31:26
23:22
21:11
BITS
BITS
31:0
10:0
25
24
Receive Descriptor 1 (RDES1)
Receive Descriptor 2 (RDES2)
Buffer 1 Address Pointer
Indicates the address of buffer 1 in the Host memory. There are no limitations on the buffer
address alignment.
Host Actions: Initializes this field.
DMAC Actions: Reads this field upon opening a new DMA descriptor to obtain the buffer
address.
RESERVED
Host Actions: Cleared on writes and ignored on reads.
DMAC Actions: Ignored on reads. DMAC does not write to RDES1.
RER - Receive End of Ring
When set, indicates that the DMAC reached the final descriptor. Upon servicing this descriptor,
the DMAC returns to the base address of the DMA descriptor list pointed to by the
Base Address Register
Host Actions: Initializes this bit.
DMAC Actions: Reads this bit to determine if this is the final descriptor in the ring.
RCH - Second Address Chained
When set, indicates that the second address in the descriptor is the next descriptor address,
rather than the second buffer address. When RCH is set, RBS2 (RDES1[21:11]) must be all
zeros. RCH is ignored if RER (RDES1[25]) is set.
Host Actions: Initializes this bit.
DMAC Actions: Reads this bit to determine if second address is next descriptor address.
RESERVED
Host Actions: Cleared on writes and ignored on reads.
DMAC Actions: Ignored on reads. DMAC does not write to RDES1.
RBS2 - Receive Buffer 2 Size
Indicates the size, in bytes, of the second data buffer. The buffer size must be a multiple of 4.
This field is not valid if RCH (RDES1[24]) is set.
Host Actions: Initializes this field.
DMAC Actions: Reads this field to determine the allocated size of associated data buffer.
RBS1 - Receive Buffer 1 Size
Indicates the size, in bytes, of the first data buffer. The buffer size must be a multiple of 4. In the
case the buffer size is not a multiple of 4, the resulting behavior is undefined. If this field is 0,
the DMA controller ignores this buffer and uses buffer2. (This field cannot be zero if the
descriptor chaining is used – Second Address Chained (RCH - RDES1[24]) is set).
Host Actions: Initializes this field.
DMAC Actions: Reads this field to determine the allocated size of associated data buffer.
(RX_BASE_ADDR).
Table 3.6 RDES1 Bit Fields
Table 3.7 RDES2 Bit Fields
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
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DESCRIPTION
DESCRIPTION
SMSC LAN9420/LAN9420i
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