RC82562EP Intel, RC82562EP Datasheet - Page 148
RC82562EP
Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Specifications of RC82562EP
Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361
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Wake-up Functionality
A.4.1
A.4.2
A.4.3
140
Note: The 82558 B-step has the following modifications:
Note: The broadcast disable configuration bit should equal 0 (broadcast enabled).
Magic Packet*
The 82558 and later generation controllers (except the 82559ER) are capable of generating a wake-
up event upon reception of a Magic Packet. This feature is enabled by setting a bit in the
Configuration command.
Address Matching
The controller may be configured to wake up the system on any packet that passes the Individual
Address filtering or the multicast address filtering. The wake up enable control is done by the
individual address match wake enable bit and the multicast match wake enable bit of the
configuration structure.
ARP Packet Filtering
Address Resolution Protocol (ARP) is used for MAC address resolution of a machine. This
protocol generally precedes any IP transaction. The controller can wake up the system when an
ARP frame is received if configured by the ARP Wake Enable (ARP_Wake_En) configuration bit.
The 82558 and 82559 devices are capable of handling 802.1q VLAN headers if they are configured
by the VLAN ARP configuration bit. If this bit is set to 1, the devices can handle ARP frames with
or without a 4-byte VLAN header. If it is set to 0 (default), only ARP frames without the VLAN
header pass the filter. Multiple IP addresses are not supported by the fixed ARP filter. However,
they can be handled through flexible filtering.
The controller needs to be configured with the 16 least significant bits of the IP address
(IP_Address configuration word) if ARP filtering is enabled.
The ARP frame format is illustrated below.
0-5
•
•
•
Offset
Address match wake up depends on two configuration bits:
Regardless of the power management event configuration, packets that pass address filtering
are transferred to the micromachine for either storage or further processing if the clock signal
is active on the PCI CLK pin.
The 82558 B-step will not wake up the system on a broadcast address match (except for ARP
frames and frames that match the flexible filtering definition).
— Bit 0 in Byte 19 of the configuration structure changed its role from Address Wake Enable
— Bit 7 in Byte 9 of the configuration structure is MC Match Wake Enable.
to IA Match Wake Enable.
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
FF, ... FF
Hexadecimal Pattern
Broadcast destination address
Description
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